arch/arm64/boot/dts/freescale/imx8qm-apalis.dtsi
Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/freescale/imx8qm-apalis.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm64/boot/dts/freescale/imx8qm-apalis.dtsi- Extension
.dtsi- Size
- 6759 bytes
- Lines
- 334
- Domain
- Architecture Layer
- Bucket
- arch/arm64
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
imx8qm-apalis-v1.1.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright 2022 Toradex
*/
#include "imx8qm-apalis-v1.1.dtsi"
/ {
model = "Toradex Apalis iMX8QM";
};
ðphy0 {
interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
};
/*
* Apalis iMX8QM V1.0 has PHY KSZ9031. the Micrel PHY driver
* doesn't support setting internal PHY delay for TXC line for
* this PHY model. Use delay on MAC side instead.
*/
&fec1 {
phy-mode = "rgmii-rxid";
};
&hsio_refa_clk {
enable-gpios = <&lsio_gpio4 27 GPIO_ACTIVE_HIGH>;
};
/* TODO: Apalis HDMI1 */
/* Apalis I2C2 (DDC) */
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lpi2c0>;
#address-cells = <1>;
#size-cells = <0>;
clock-frequency = <100000>;
};
&lsio_gpio0 {
gpio-line-names = "MXM3_279",
"MXM3_277",
"MXM3_135",
"MXM3_203",
"MXM3_201",
"MXM3_275",
"MXM3_110",
"MXM3_120",
"MXM3_1/GPIO1",
"MXM3_3/GPIO2",
"MXM3_124",
"MXM3_122",
"MXM3_5/GPIO3",
"MXM3_7/GPIO4",
"",
"",
"MXM3_4",
"MXM3_211",
"MXM3_209",
"MXM3_2",
"MXM3_136",
"MXM3_134",
"MXM3_6",
"MXM3_8",
"MXM3_112",
"MXM3_118",
"MXM3_114",
"MXM3_116";
};
Annotation
- Immediate include surface: `imx8qm-apalis-v1.1.dtsi`.
- Atlas domain: Architecture Layer / arch/arm64.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.