arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-eval-v1.2.dts
Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-eval-v1.2.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-eval-v1.2.dts- Extension
.dts- Size
- 478 bytes
- Lines
- 27
- Domain
- Architecture Layer
- Bucket
- arch/arm64
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
imx8qm-apalis-v1.1.dtsiimx8-apalis-eval-v1.2.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright 2024 Toradex
*/
/dts-v1/;
#include "imx8qm-apalis-v1.1.dtsi"
#include "imx8-apalis-eval-v1.2.dtsi"
/ {
model = "Toradex Apalis iMX8QM V1.1 on Apalis Evaluation Board V1.2";
compatible = "toradex,apalis-imx8-v1.1-eval-v1.2",
"toradex,apalis-imx8-v1.1",
"fsl,imx8qm";
};
/* Apalis MMC1 */
&usdhc2 {
/delete-property/ no-1-8-v;
};
/* Apalis SD1 */
&usdhc3 {
/delete-property/ no-1-8-v;
};
Annotation
- Immediate include surface: `imx8qm-apalis-v1.1.dtsi`, `imx8-apalis-eval-v1.2.dtsi`.
- Atlas domain: Architecture Layer / arch/arm64.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.