arch/arm64/boot/dts/freescale/imx91-var-dart.dtsi

Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/freescale/imx91-var-dart.dtsi

File Facts

System
Linux kernel
Corpus path
arch/arm64/boot/dts/freescale/imx91-var-dart.dtsi
Extension
.dtsi
Size
12846 bytes
Lines
469
Domain
Architecture Layer
Bucket
arch/arm64
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Common dtsi for Variscite DART-MX91
 *
 * Link: https://variscite.com/system-on-module-som/i-mx-9/i-mx-91/dart-mx91/
 *
 * Copyright (C) 2026 Variscite Ltd. - https://www.variscite.com/
 *
 */

/dts-v1/;

#include <dt-bindings/leds/common.h>
#include <dt-bindings/usb/pd.h>
#include "imx91.dtsi"

/ {
	model = "Variscite DART-MX91 Module";
	compatible = "variscite,var-dart-mx91", "fsl,imx91";

	sound-wm8904 {
		compatible = "simple-audio-card";
		simple-audio-card,bitclock-master = <&codec_dai>;
		simple-audio-card,format = "i2s";
		simple-audio-card,frame-master = <&codec_dai>;
		simple-audio-card,mclk-fs = <256>;
		simple-audio-card,name = "wm8904-audio";
		simple-audio-card,routing =
			"Headphone Jack", "HPOUTL",
			"Headphone Jack", "HPOUTR",
			"IN2L", "Line In Jack",
			"IN2R", "Line In Jack",
			"IN1L", "Microphone Jack",
			"IN1R", "Microphone Jack";
		simple-audio-card,widgets =
			"Microphone", "Microphone Jack",
			"Headphone", "Headphone Jack",
			"Line", "Line In Jack";

		codec_dai: simple-audio-card,codec {
			sound-dai = <&wm8904>;
		};

		simple-audio-card,cpu {
			sound-dai = <&sai1>;
		};
	};

	wifi_pwrseq: wifi-pwrseq {
		compatible = "mmc-pwrseq-simple";
		post-power-on-delay-ms = <100>;
		power-off-delay-us = <10000>;
		reset-gpios = <&gpio4 14 GPIO_ACTIVE_LOW>, /* WIFI_RESET */
			      <&gpio3 7 GPIO_ACTIVE_LOW>; /* WIFI_PWR_EN */
	};
};

&eqos {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&pinctrl_eqos>;
	pinctrl-1 = <&pinctrl_eqos_sleep>;
	/*
	 * The required RGMII TX and RX 2ns delays are implemented directly
	 * in hardware via passive delay elements on the SOM PCB.
	 * No delay configuration is needed in software via PHY driver.
	 */
	phy-mode = "rgmii";
	phy-handle = <&ethphy0>;
	snps,clk-csr = <5>;
	status = "okay";

Annotation

Implementation Notes