arch/arm64/boot/dts/freescale/imx93-phyboard-segin-peb-wlbt-05.dtso

Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/freescale/imx93-phyboard-segin-peb-wlbt-05.dtso

File Facts

System
Linux kernel
Corpus path
arch/arm64/boot/dts/freescale/imx93-phyboard-segin-peb-wlbt-05.dtso
Extension
.dtso
Size
2243 bytes
Lines
94
Domain
Architecture Layer
Bucket
arch/arm64
Inferred role
Architecture Layer: arch/arm64
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (C) 2025 PHYTEC Messtechnik GmbH
 * Author: Andrej Picej <andrej.picej@norik.com>
 */

/dts-v1/;
/plugin/;

#include <dt-bindings/gpio/gpio.h>
#include "imx93-pinfunc.h"

&{/} {
	usdhc3_pwrseq: usdhc3-pwrseq {
		compatible = "mmc-pwrseq-simple";
		post-power-on-delay-ms = <100>;
		power-off-delay-us = <60>;
		reset-gpios = <&gpio4 7 GPIO_ACTIVE_LOW>;
	};
};

&lpuart5 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart5>;
	status = "okay";

	bluetooth {
		compatible = "brcm,bcm43438-bt";
		shutdown-gpios = <&gpio4 13 GPIO_ACTIVE_HIGH>;
		host-wakeup-gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>;
		max-speed = <2000000>;
	};
};

&usdhc3 {
	#address-cells = <1>;
	#size-cells = <0>;
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&pinctrl_usdhc3>, <&pinctrl_wlbt>;
	pinctrl-1 = <&pinctrl_usdhc3_sleep>, <&pinctrl_wlbt>;
	mmc-pwrseq = <&usdhc3_pwrseq>;
	bus-width = <4>;
	non-removable;
	no-1-8-v;
	status = "okay";

	brmcf: wifi@1 {
		compatible = "brcm,bcm4329-fmac";
		reg = <1>;
	};
};

&iomuxc {
	pinctrl_uart5: uart5grp {
		fsl,pins = <
			MX93_PAD_DAP_TDO_TRACESWO__LPUART5_TX	0x31e
			MX93_PAD_DAP_TDI__LPUART5_RX		0x31e
			MX93_PAD_DAP_TCLK_SWCLK__LPUART5_CTS_B	0x31e
			MX93_PAD_DAP_TMS_SWDIO__LPUART5_RTS_B	0x31e
		>;
	};

	/* need to config the SION for data and cmd pad, refer to ERR052021 */
	pinctrl_usdhc3: usdhc3grp {
		fsl,pins = <
			MX93_PAD_GPIO_IO22__USDHC3_CLK		0x179e
			MX93_PAD_GPIO_IO23__USDHC3_CMD		0x4000139e
			MX93_PAD_GPIO_IO24__USDHC3_DATA0	0x4000139e
			MX93_PAD_GPIO_IO25__USDHC3_DATA1	0x4000139e
			MX93_PAD_GPIO_IO26__USDHC3_DATA2	0x4000139e

Annotation

Implementation Notes