arch/arm64/boot/dts/freescale/imx94-pinfunc.h
Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/freescale/imx94-pinfunc.h
File Facts
- System
- Linux kernel
- Corpus path
arch/arm64/boot/dts/freescale/imx94-pinfunc.h- Extension
.h- Size
- 124008 bytes
- Lines
- 1583
- Domain
- Architecture Layer
- Bucket
- arch/arm64
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef __DTS_IMX94_PINFUNC_H
#define __DTS_IMX94_PINFUNC_H
/* Drive Strength */
#define IMX94_DSE_X1 0x2
#define IMX94_DSE_X2 0x6
#define IMX94_DSE_X3 0xe
#define IMX94_DSE_X4 0x1e
#define IMX94_DSE_X5 0x3e
#define IMX94_DSE_X6 0x7e
/* Slew Rate */
#define IMX94_FSEL_FAST 0x180
#define IMX94_FSEL_SLOW 0x100
/* Pull Up */
#define IMX94_PU_ENABLE 0x200
#define IMX94_PU_DISABLE 0x0
/* Pull Down */
#define IMX94_PD_ENABLE 0x400
#define IMX94_PD_DISABLE 0x0
/* Open Drain */
#define IMX94_OD_ENABLE 0x800
#define IMX94_OD_DISABLE 0x0
/* Schmitt trigger */
#define IMX94_HYS_SCHMITT 0x1000
#define IMX94_HYS_NO_SCHMITT 0x0
/*
* The pin function ID is a tuple of <mux_reg conf_reg input_reg mux_mode input_val>
*/
#define IMX94_PAD_DAP_TDI__JTAG_MUX_TDI 0x0000 0x0304 0x092c 0x00 0x00
#define IMX94_PAD_DAP_TDI__MQS2_LEFT 0x0000 0x0304 0x0000 0x01 0x00
#define IMX94_PAD_DAP_TDI__ECAT_LED_ERR 0x0000 0x0304 0x0000 0x02 0x00
#define IMX94_PAD_DAP_TDI__CAN2_TX 0x0000 0x0304 0x0000 0x03 0x00
#define IMX94_PAD_DAP_TDI__SINC_FILTER_GLUE3_BREAK 0x0000 0x0304 0x0000 0x04 0x00
#define IMX94_PAD_DAP_TDI__GPIO4_IO4 0x0000 0x0304 0x0000 0x05 0x00
#define IMX94_PAD_DAP_TDI__LPUART5_RX 0x0000 0x0304 0x07bc 0x06 0x00
#define IMX94_PAD_DAP_TDI__XBAR1_XBAR_INOUT26 0x0000 0x0304 0x0000 0x07 0x00
#define IMX94_PAD_DAP_TMS_SWDIO__JTAG_MUX_TMS 0x0004 0x0308 0x0930 0x00 0x00
#define IMX94_PAD_DAP_TMS_SWDIO__CAN5_TX 0x0004 0x0308 0x0000 0x01 0x00
#define IMX94_PAD_DAP_TMS_SWDIO__GPT_MUX_INOUT10 0x0004 0x0308 0x0000 0x02 0x00
#define IMX94_PAD_DAP_TMS_SWDIO__LPUART8_TX 0x0004 0x0308 0x07dc 0x03 0x00
#define IMX94_PAD_DAP_TMS_SWDIO__SINC3_MOD_CLK1 0x0004 0x0308 0x0000 0x04 0x00
#define IMX94_PAD_DAP_TMS_SWDIO__GPIO4_IO5 0x0004 0x0308 0x0000 0x05 0x00
#define IMX94_PAD_DAP_TMS_SWDIO__LPUART5_RTS_B 0x0004 0x0308 0x0000 0x06 0x00
#define IMX94_PAD_DAP_TMS_SWDIO__XBAR1_XBAR_INOUT27 0x0004 0x0308 0x0000 0x07 0x00
#define IMX94_PAD_DAP_TCLK_SWCLK__JTAG_MUX_TCK 0x0008 0x030c 0x0928 0x00 0x00
#define IMX94_PAD_DAP_TCLK_SWCLK__CAN5_RX 0x0008 0x030c 0x0688 0x01 0x00
#define IMX94_PAD_DAP_TCLK_SWCLK__GPT_MUX_INOUT11 0x0008 0x030c 0x0000 0x02 0x00
#define IMX94_PAD_DAP_TCLK_SWCLK__LPUART8_RX 0x0008 0x030c 0x07d8 0x03 0x00
#define IMX94_PAD_DAP_TCLK_SWCLK__SINC3_MOD_CLK0 0x0008 0x030c 0x0000 0x04 0x00
#define IMX94_PAD_DAP_TCLK_SWCLK__GPIO4_IO6 0x0008 0x030c 0x0000 0x05 0x00
#define IMX94_PAD_DAP_TCLK_SWCLK__LPUART5_CTS_B 0x0008 0x030c 0x07b8 0x06 0x00
#define IMX94_PAD_DAP_TCLK_SWCLK__XBAR1_XBAR_INOUT28 0x0008 0x030c 0x0000 0x07 0x00
#define IMX94_PAD_DAP_TDO_TRACESWO__JTAG_MUX_TDO 0x000c 0x0310 0x0000 0x00 0x00
#define IMX94_PAD_DAP_TDO_TRACESWO__MQS2_RIGHT 0x000c 0x0310 0x0000 0x01 0x00
#define IMX94_PAD_DAP_TDO_TRACESWO__ECAT_RESET_OUT 0x000c 0x0310 0x0000 0x02 0x00
#define IMX94_PAD_DAP_TDO_TRACESWO__CAN2_RX 0x000c 0x0310 0x067c 0x03 0x00
#define IMX94_PAD_DAP_TDO_TRACESWO__SINC3_MOD_CLK2 0x000c 0x0310 0x0000 0x04 0x00
#define IMX94_PAD_DAP_TDO_TRACESWO__GPIO4_IO7 0x000c 0x0310 0x0000 0x05 0x00
#define IMX94_PAD_DAP_TDO_TRACESWO__LPUART5_TX 0x000c 0x0310 0x07c0 0x06 0x00
#define IMX94_PAD_DAP_TDO_TRACESWO__XBAR1_XBAR_INOUT29 0x000c 0x0310 0x0000 0x07 0x00
#define IMX94_PAD_GPIO_IO00__GPIO2_IO0 0x0010 0x0314 0x0000 0x00 0x00
#define IMX94_PAD_GPIO_IO00__I3C2_PUR 0x0010 0x0314 0x0000 0x01 0x00
#define IMX94_PAD_GPIO_IO00__XBAR1_XBAR_INOUT39 0x0010 0x0314 0x08d4 0x02 0x00
#define IMX94_PAD_GPIO_IO00__I3C2_PUR_B 0x0010 0x0314 0x0000 0x03 0x00
#define IMX94_PAD_GPIO_IO00__LPSPI6_PCS0 0x0010 0x0314 0x0000 0x04 0x00
#define IMX94_PAD_GPIO_IO00__LPUART5_TX 0x0010 0x0314 0x07c0 0x05 0x01
#define IMX94_PAD_GPIO_IO00__LPI2C5_SDA 0x0010 0x0314 0x0740 0x06 0x00
#define IMX94_PAD_GPIO_IO00__FLEXIO1_FLEXIO0 0x0010 0x0314 0x0000 0x07 0x00
#define IMX94_PAD_GPIO_IO01__GPIO2_IO1 0x0014 0x0318 0x0000 0x00 0x00
#define IMX94_PAD_GPIO_IO01__I3C2_SCL 0x0014 0x0318 0x0720 0x01 0x00
#define IMX94_PAD_GPIO_IO01__XBAR1_XBAR_INOUT40 0x0014 0x0318 0x08d8 0x02 0x00
#define IMX94_PAD_GPIO_IO01__EWM_OUT_B 0x0014 0x0318 0x0000 0x03 0x00
#define IMX94_PAD_GPIO_IO01__LPSPI6_SIN 0x0014 0x0318 0x0000 0x04 0x00
#define IMX94_PAD_GPIO_IO01__LPUART5_RX 0x0014 0x0318 0x07bc 0x05 0x01
#define IMX94_PAD_GPIO_IO01__LPI2C5_SCL 0x0014 0x0318 0x073c 0x06 0x00
#define IMX94_PAD_GPIO_IO01__FLEXIO1_FLEXIO1 0x0014 0x0318 0x0000 0x07 0x00
#define IMX94_PAD_GPIO_IO02__GPIO2_IO2 0x0018 0x031c 0x0000 0x00 0x00
#define IMX94_PAD_GPIO_IO02__I3C2_SDA 0x0018 0x031c 0x0724 0x01 0x00
Annotation
- Atlas domain: Architecture Layer / arch/arm64.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.