arch/arm64/boot/dts/freescale/imx95-clock.h

Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/freescale/imx95-clock.h

File Facts

System
Linux kernel
Corpus path
arch/arm64/boot/dts/freescale/imx95-clock.h
Extension
.h
Size
11847 bytes
Lines
189
Domain
Architecture Layer
Bucket
arch/arm64
Inferred role
Architecture Layer: implementation source
Status
source implementation candidate

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef __CLOCK_IMX95_H
#define __CLOCK_IMX95_H

/* The index should match i.MX95 SCMI Firmware */
#define IMX95_CLK_32K                       1
#define IMX95_CLK_24M                       2
#define IMX95_CLK_FRO                       3
#define IMX95_CLK_SYSPLL1_VCO               4
#define IMX95_CLK_SYSPLL1_PFD0_UNGATED      5
#define IMX95_CLK_SYSPLL1_PFD0              6
#define IMX95_CLK_SYSPLL1_PFD0_DIV2         7
#define IMX95_CLK_SYSPLL1_PFD1_UNGATED      8
#define IMX95_CLK_SYSPLL1_PFD1              9
#define IMX95_CLK_SYSPLL1_PFD1_DIV2         10
#define IMX95_CLK_SYSPLL1_PFD2_UNGATED      11
#define IMX95_CLK_SYSPLL1_PFD2              12
#define IMX95_CLK_SYSPLL1_PFD2_DIV2         13
#define IMX95_CLK_AUDIOPLL1_VCO             14
#define IMX95_CLK_AUDIOPLL1                 15
#define IMX95_CLK_AUDIOPLL2_VCO             16
#define IMX95_CLK_AUDIOPLL2                 17
#define IMX95_CLK_VIDEOPLL1_VCO             18
#define IMX95_CLK_VIDEOPLL1                 19
#define IMX95_CLK_RESERVED20                20
#define IMX95_CLK_RESERVED21                21
#define IMX95_CLK_RESERVED22                22
#define IMX95_CLK_RESERVED23                23
#define IMX95_CLK_ARMPLL_VCO                24
#define IMX95_CLK_ARMPLL_PFD0_UNGATED       25
#define IMX95_CLK_ARMPLL_PFD0               26
#define IMX95_CLK_ARMPLL_PFD1_UNGATED       27
#define IMX95_CLK_ARMPLL_PFD1               28
#define IMX95_CLK_ARMPLL_PFD2_UNGATED       29
#define IMX95_CLK_ARMPLL_PFD2               30
#define IMX95_CLK_ARMPLL_PFD3_UNGATED       31
#define IMX95_CLK_ARMPLL_PFD3               32
#define IMX95_CLK_DRAMPLL_VCO               33
#define IMX95_CLK_DRAMPLL                   34
#define IMX95_CLK_HSIOPLL_VCO               35
#define IMX95_CLK_HSIOPLL                   36
#define IMX95_CLK_LDBPLL_VCO                37
#define IMX95_CLK_LDBPLL                    38
#define IMX95_CLK_EXT1                      39
#define IMX95_CLK_EXT2                      40

#define IMX95_CCM_NUM_CLK_SRC               41

#define IMX95_CLK_ADC                      (IMX95_CCM_NUM_CLK_SRC + 0)
#define IMX95_CLK_TMU                      (IMX95_CCM_NUM_CLK_SRC + 1)
#define IMX95_CLK_BUSAON                   (IMX95_CCM_NUM_CLK_SRC + 2)
#define IMX95_CLK_CAN1                     (IMX95_CCM_NUM_CLK_SRC + 3)
#define IMX95_CLK_I3C1                     (IMX95_CCM_NUM_CLK_SRC + 4)
#define IMX95_CLK_I3C1SLOW                 (IMX95_CCM_NUM_CLK_SRC + 5)
#define IMX95_CLK_LPI2C1                   (IMX95_CCM_NUM_CLK_SRC + 6)
#define IMX95_CLK_LPI2C2                   (IMX95_CCM_NUM_CLK_SRC + 7)
#define IMX95_CLK_LPSPI1                   (IMX95_CCM_NUM_CLK_SRC + 8)
#define IMX95_CLK_LPSPI2                   (IMX95_CCM_NUM_CLK_SRC + 9)
#define IMX95_CLK_LPTMR1                   (IMX95_CCM_NUM_CLK_SRC + 10)
#define IMX95_CLK_LPUART1                  (IMX95_CCM_NUM_CLK_SRC + 11)
#define IMX95_CLK_LPUART2                  (IMX95_CCM_NUM_CLK_SRC + 12)
#define IMX95_CLK_M33                      (IMX95_CCM_NUM_CLK_SRC + 13)
#define IMX95_CLK_M33SYSTICK               (IMX95_CCM_NUM_CLK_SRC + 14)
#define IMX95_CLK_MQS1                     (IMX95_CCM_NUM_CLK_SRC + 15)
#define IMX95_CLK_PDM                      (IMX95_CCM_NUM_CLK_SRC + 16)
#define IMX95_CLK_SAI1                     (IMX95_CCM_NUM_CLK_SRC + 17)
#define IMX95_CLK_SENTINEL                 (IMX95_CCM_NUM_CLK_SRC + 18)
#define IMX95_CLK_TPM2                     (IMX95_CCM_NUM_CLK_SRC + 19)
#define IMX95_CLK_TSTMR1                   (IMX95_CCM_NUM_CLK_SRC + 20)
#define IMX95_CLK_CAMAPB                   (IMX95_CCM_NUM_CLK_SRC + 21)
#define IMX95_CLK_CAMAXI                   (IMX95_CCM_NUM_CLK_SRC + 22)
#define IMX95_CLK_CAMCM0                   (IMX95_CCM_NUM_CLK_SRC + 23)
#define IMX95_CLK_CAMISI                   (IMX95_CCM_NUM_CLK_SRC + 24)
#define IMX95_CLK_MIPIPHYCFG               (IMX95_CCM_NUM_CLK_SRC + 25)
#define IMX95_CLK_MIPIPHYPLLBYPASS         (IMX95_CCM_NUM_CLK_SRC + 26)
#define IMX95_CLK_MIPIPHYPLLREF            (IMX95_CCM_NUM_CLK_SRC + 27)
#define IMX95_CLK_MIPITESTBYTE             (IMX95_CCM_NUM_CLK_SRC + 28)
#define IMX95_CLK_A55                      (IMX95_CCM_NUM_CLK_SRC + 29)
#define IMX95_CLK_A55MTRBUS                (IMX95_CCM_NUM_CLK_SRC + 30)
#define IMX95_CLK_A55PERIPH                (IMX95_CCM_NUM_CLK_SRC + 31)
#define IMX95_CLK_DRAMALT                  (IMX95_CCM_NUM_CLK_SRC + 32)
#define IMX95_CLK_DRAMAPB                  (IMX95_CCM_NUM_CLK_SRC + 33)
#define IMX95_CLK_DISPAPB                  (IMX95_CCM_NUM_CLK_SRC + 34)
#define IMX95_CLK_DISPAXI                  (IMX95_CCM_NUM_CLK_SRC + 35)
#define IMX95_CLK_DISPDP                   (IMX95_CCM_NUM_CLK_SRC + 36)
#define IMX95_CLK_DISPOCRAM                (IMX95_CCM_NUM_CLK_SRC + 37)
#define IMX95_CLK_DISPUSB31                (IMX95_CCM_NUM_CLK_SRC + 38)
#define IMX95_CLK_DISP1PIX                 (IMX95_CCM_NUM_CLK_SRC + 39)
#define IMX95_CLK_DISP2PIX                 (IMX95_CCM_NUM_CLK_SRC + 40)
#define IMX95_CLK_DISP3PIX                 (IMX95_CCM_NUM_CLK_SRC + 41)
#define IMX95_CLK_GPUAPB                   (IMX95_CCM_NUM_CLK_SRC + 42)

Annotation

Implementation Notes