arch/arm64/boot/dts/freescale/s32g274a-evb.dts
Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/freescale/s32g274a-evb.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/arm64/boot/dts/freescale/s32g274a-evb.dts- Extension
.dts- Size
- 1127 bytes
- Lines
- 62
- Domain
- Architecture Layer
- Bucket
- arch/arm64
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
s32g2.dtsis32gxxxa-evb.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright (c) 2021 SUSE LLC
* Copyright 2019-2021, 2024-2025 NXP
*/
/dts-v1/;
#include "s32g2.dtsi"
#include "s32gxxxa-evb.dtsi"
/ {
model = "NXP S32G2 Evaluation Board (S32G-VNP-EVB)";
compatible = "nxp,s32g274a-evb", "nxp,s32g2";
aliases {
ethernet0 = &gmac0;
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
/* 4GiB RAM */
memory@80000000 {
device_type = "memory";
reg = <0x0 0x80000000 0 0x80000000>,
<0x8 0x80000000 0 0x80000000>;
};
};
/* UART (J58) to Micro USB port */
&uart0 {
status = "okay";
};
&usdhc0 {
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc0>;
pinctrl-1 = <&pinctrl_usdhc0_100mhz>;
pinctrl-2 = <&pinctrl_usdhc0_200mhz>;
disable-wp;
no-1-8-v;
status = "okay";
};
&gmac0 {
clocks = <&clks 24>, <&clks 19>, <&clks 18>, <&clks 15>;
clock-names = "stmmaceth", "tx", "rx", "ptp_ref";
phy-mode = "rgmii-id";
phy-handle = <&rgmiiaphy4>;
status = "okay";
};
&gmac0mdio {
/* KSZ 9031 on RGMII */
rgmiiaphy4: ethernet-phy@4 {
reg = <4>;
};
};
Annotation
- Immediate include surface: `s32g2.dtsi`, `s32gxxxa-evb.dtsi`.
- Atlas domain: Architecture Layer / arch/arm64.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.