arch/arm64/boot/dts/freescale/tqma8xx.dtsi
Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/freescale/tqma8xx.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm64/boot/dts/freescale/tqma8xx.dtsi- Extension
.dtsi- Size
- 6772 bytes
- Lines
- 278
- Domain
- Architecture Layer
- Bucket
- arch/arm64
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: (GPL-2.0-or-later OR X11)
/*
* Copyright 2018-2023 TQ-Systems GmbH <linux@ew.tq-group.com>,
* D-82229 Seefeld, Germany.
* Author: Alexander Stein
*/
/ {
memory@80000000 {
device_type = "memory";
reg = <0x00000000 0x80000000 0 0x40000000>;
};
reg_1v8: regulator-1v8 {
compatible = "regulator-fixed";
regulator-name = "V_1V8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
reg_3v3: regulator-3v3 {
compatible = "regulator-fixed";
regulator-name = "V_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
/*
* global autoconfigured region for contiguous allocations
* must not exceed memory size and region
*/
linux,cma {
compatible = "shared-dma-pool";
reusable;
size = <0 0x20000000>;
alloc-ranges = <0 0x96000000 0 0x30000000>;
linux,cma-default;
};
};
};
/* TQMa8Xx only uses industrial grade, reduce trip points accordingly */
&cpu_alert0 {
temperature = <95000>;
};
&cpu_crit0 {
temperature = <100000>;
};
/* end of temperature grade adjustments */
&flexspi0 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flexspi0>;
status = "okay";
flash0: flash@0 {
reg = <0>;
compatible = "jedec,spi-nor";
spi-max-frequency = <66000000>;
spi-tx-bus-width = <1>;
spi-rx-bus-width = <4>;
vcc-supply = <®_1v8>;
partitions {
Annotation
- Atlas domain: Architecture Layer / arch/arm64.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.