arch/arm64/boot/dts/hisilicon/hi3660-coresight.dtsi
Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/hisilicon/hi3660-coresight.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm64/boot/dts/hisilicon/hi3660-coresight.dtsi- Extension
.dtsi- Size
- 8624 bytes
- Lines
- 465
- Domain
- Architecture Layer
- Bucket
- arch/arm64
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0
/*
* dtsi for Hisilicon Hi3660 Coresight
*
* Copyright (C) 2016-2018 HiSilicon Ltd.
*
* Author: Wanglai Shi <shiwanglai@hisilicon.com>
*
*/
/ {
soc {
/* A53 cluster internals */
etm@ecc40000 {
compatible = "arm,coresight-etm4x", "arm,primecell";
reg = <0 0xecc40000 0 0x1000>;
clocks = <&crg_ctrl HI3660_PCLK>;
clock-names = "apb_pclk";
cpu = <&cpu0>;
arm,coresight-loses-context-with-cpu;
out-ports {
port {
etm0_out: endpoint {
remote-endpoint =
<&cluster0_funnel_in0>;
};
};
};
};
etm@ecd40000 {
compatible = "arm,coresight-etm4x", "arm,primecell";
reg = <0 0xecd40000 0 0x1000>;
clocks = <&crg_ctrl HI3660_PCLK>;
clock-names = "apb_pclk";
cpu = <&cpu1>;
arm,coresight-loses-context-with-cpu;
out-ports {
port {
etm1_out: endpoint {
remote-endpoint =
<&cluster0_funnel_in1>;
};
};
};
};
etm@ece40000 {
compatible = "arm,coresight-etm4x", "arm,primecell";
reg = <0 0xece40000 0 0x1000>;
clocks = <&crg_ctrl HI3660_PCLK>;
clock-names = "apb_pclk";
cpu = <&cpu2>;
arm,coresight-loses-context-with-cpu;
out-ports {
port {
etm2_out: endpoint {
remote-endpoint =
<&cluster0_funnel_in2>;
};
};
};
};
etm@ecf40000 {
compatible = "arm,coresight-etm4x", "arm,primecell";
reg = <0 0xecf40000 0 0x1000>;
Annotation
- Atlas domain: Architecture Layer / arch/arm64.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.