arch/arm64/boot/dts/hisilicon/hi3660.dtsi

Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/hisilicon/hi3660.dtsi

File Facts

System
Linux kernel
Corpus path
arch/arm64/boot/dts/hisilicon/hi3660.dtsi
Extension
.dtsi
Size
32098 bytes
Lines
1200
Domain
Architecture Layer
Bucket
arch/arm64
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0
/*
 * dts file for Hisilicon Hi3660 SoC
 *
 * Copyright (C) 2016, HiSilicon Ltd.
 */

#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/hi3660-clock.h>
#include <dt-bindings/thermal/thermal.h>

/ {
	compatible = "hisilicon,hi3660";
	interrupt-parent = <&gic>;
	#address-cells = <2>;
	#size-cells = <2>;

	psci {
		compatible = "arm,psci-0.2";
		method = "smc";
	};

	cpus {
		#address-cells = <2>;
		#size-cells = <0>;

		cpu-map {
			cluster0 {
				core0 {
					cpu = <&cpu0>;
				};
				core1 {
					cpu = <&cpu1>;
				};
				core2 {
					cpu = <&cpu2>;
				};
				core3 {
					cpu = <&cpu3>;
				};
			};
			cluster1 {
				core0 {
					cpu = <&cpu4>;
				};
				core1 {
					cpu = <&cpu5>;
				};
				core2 {
					cpu = <&cpu6>;
				};
				core3 {
					cpu = <&cpu7>;
				};
			};
		};

		cpu0: cpu@0 {
			compatible = "arm,cortex-a53";
			device_type = "cpu";
			reg = <0x0 0x0>;
			enable-method = "psci";
			next-level-cache = <&A53_L2>;
			cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
			capacity-dmips-mhz = <592>;
			clocks = <&stub_clock HI3660_CLK_STUB_CLUSTER0>;
			operating-points-v2 = <&cluster0_opp>;
			#cooling-cells = <2>;
			dynamic-power-coefficient = <110>;
		};

Annotation

Implementation Notes