arch/arm64/boot/dts/marvell/cn9130-cf-base.dts
Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/marvell/cn9130-cf-base.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/arm64/boot/dts/marvell/cn9130-cf-base.dts- Extension
.dts- Size
- 3464 bytes
- Lines
- 179
- Domain
- Architecture Layer
- Bucket
- arch/arm64
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
dt-bindings/input/input.hdt-bindings/leds/common.hcn9130.dtsicn9130-sr-som.dtsicn9130-cf.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2024 Josua Mayer <josua@solid-run.com>
*
* DTS for SolidRun CN9130 Clearfog Base.
*
*/
/dts-v1/;
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include "cn9130.dtsi"
#include "cn9130-sr-som.dtsi"
#include "cn9130-cf.dtsi"
/ {
model = "SolidRun CN9130 Clearfog Base";
compatible = "solidrun,cn9130-clearfog-base",
"solidrun,cn9130-sr-som", "marvell,cn9130";
gpio-keys {
compatible = "gpio-keys";
pinctrl-0 = <&rear_button_pins>;
pinctrl-names = "default";
button-0 {
/* The rear SW3 button */
label = "Rear Button";
gpios = <&cp0_gpio1 31 GPIO_ACTIVE_LOW>;
linux,can-disable;
linux,code = <BTN_0>;
};
};
rfkill-m2-gnss {
compatible = "rfkill-gpio";
label = "m.2 GNSS";
radio-type = "gps";
/* rfkill-gpio inverts internally */
shutdown-gpios = <&expander0 9 GPIO_ACTIVE_HIGH>;
};
/* M.2 is B-keyed, so w-disable is for WWAN */
rfkill-m2-wwan {
compatible = "rfkill-gpio";
label = "m.2 WWAN";
radio-type = "wwan";
/* rfkill-gpio inverts internally */
shutdown-gpios = <&expander0 8 GPIO_ACTIVE_HIGH>;
};
};
/* SRDS #3 - SGMII 1GE */
&cp0_eth1 {
phy = <&phy1>;
phys = <&cp0_comphy3 1>;
phy-mode = "sgmii";
status = "okay";
};
&cp0_eth2_phy {
/*
* Configure LEDs default behaviour:
* - LED[0]: link/activity: On/blink (green)
* - LED[1]: link is 100/1000Mbps: On (yellow)
* - LED[2]: high impedance (floating)
*/
marvell,reg-init = <3 16 0xf000 0x0a61>;
Annotation
- Immediate include surface: `dt-bindings/input/input.h`, `dt-bindings/leds/common.h`, `cn9130.dtsi`, `cn9130-sr-som.dtsi`, `cn9130-cf.dtsi`.
- Atlas domain: Architecture Layer / arch/arm64.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.