arch/arm64/boot/dts/marvell/cn9130-crb.dtsi
Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm64/boot/dts/marvell/cn9130-crb.dtsi- Extension
.dtsi- Size
- 6756 bytes
- Lines
- 362
- Domain
- Architecture Layer
- Bucket
- arch/arm64
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
cn9130.dtsidt-bindings/gpio/gpio.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2020 Marvell International Ltd.
*/
#include "cn9130.dtsi" /* include SoC device tree */
#include <dt-bindings/gpio/gpio.h>
/ {
chosen {
stdout-path = "serial0:115200n8";
};
aliases {
i2c0 = &cp0_i2c0;
ethernet0 = &cp0_eth0;
ethernet1 = &cp0_eth1;
ethernet2 = &cp0_eth2;
gpio1 = &cp0_gpio1;
gpio2 = &cp0_gpio2;
};
memory@0 {
device_type = "memory";
reg = <0x0 0x0 0x0 0x80000000>;
};
ap0_reg_mmc_vccq: regulator-1 {
compatible = "regulator-gpio";
regulator-name = "ap0_mmc_vccq";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
gpios = <&expander0 5 GPIO_ACTIVE_HIGH>;
states = <1800000 0x1
3300000 0x0>;
};
cp0_reg_usb3_vbus1: regulator-2 {
compatible = "regulator-fixed";
regulator-name = "cp0-xhci1-vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&expander0 8 GPIO_ACTIVE_HIGH>;
};
cp0_usb3_0_phy0: usb-phy-1 {
compatible = "usb-nop-xceiv";
#phy-cells = <0>;
};
cp0_usb3_0_phy1: usb-phy-2 {
compatible = "usb-nop-xceiv";
#phy-cells = <0>;
vcc-supply = <&cp0_reg_usb3_vbus1>;
};
cp0_reg_sd_vccq: regulator-3 {
compatible = "regulator-gpio";
regulator-name = "cp0_sd_vccq";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
gpios = <&cp0_gpio2 18 GPIO_ACTIVE_HIGH>;
states = <1800000 0x1
3300000 0x0>;
};
cp0_reg_sd_vcc: regulator-4 {
compatible = "regulator-fixed";
Annotation
- Immediate include surface: `cn9130.dtsi`, `dt-bindings/gpio/gpio.h`.
- Atlas domain: Architecture Layer / arch/arm64.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.