arch/arm64/boot/dts/marvell/cn9130-db-B.dts

File Facts

System

Linux kernel

Corpus path

arch/arm64/boot/dts/marvell/cn9130-db-B.dts

Extension

.dts

Size

524 bytes

Lines

23

Domain

Architecture Layer

Bucket

arch/arm64

Inferred role

Architecture Layer: configuration, schema, or hardware description

Status

atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

• CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

• cn9130-db.dtsi

Detected Declarations

• No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (C) 2020 Marvell International Ltd.
 *
 * Device tree for the CN9130-DB board (setup "B").
 */

#include "cn9130-db.dtsi"

/ {
	model = "Marvell Armada CN9130-DB setup B";
};

/* Setup B has NAND flash as a boot device, while regular setup uses SPI flash.
 * Since CP0 SPI1 and CP0 NAND are sharing some pins, they cannot be activated
 * simultaneously. When NAND controller is enabled, SPI1 should be disabled.
 */

&cp0_nand_controller {
	status = "okay";
};

Annotation

• Immediate include surface: `cn9130-db.dtsi`.
• Atlas domain: Architecture Layer / arch/arm64.
• Implementation status: atlas-only.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.