arch/arm64/boot/dts/marvell/cn9130-sr-som.dtsi
Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/marvell/cn9130-sr-som.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm64/boot/dts/marvell/cn9130-sr-som.dtsi- Extension
.dtsi- Size
- 3302 bytes
- Lines
- 160
- Domain
- Architecture Layer
- Bucket
- arch/arm64
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
dt-bindings/gpio/gpio.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (C) 2024 Josua Mayer <josua@solid-run.com>
*
*/
#include <dt-bindings/gpio/gpio.h>
/ {
aliases {
ethernet0 = &cp0_eth0;
ethernet1 = &cp0_eth1;
ethernet2 = &cp0_eth2;
i2c0 = &cp0_i2c0;
mmc0 = &ap_sdhci0;
rtc0 = &cp0_rtc;
};
chosen {
stdout-path = "serial0:115200n8";
};
v_1_8: regulator-1-8 {
compatible = "regulator-fixed";
regulator-name = "1v8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
/* requires assembly of R9307 */
vhv: regulator-vhv-1-8 {
compatible = "regulator-fixed";
regulator-name = "vhv-1v8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
pinctrl-0 = <&cp0_reg_vhv_pins>;
pinctrl-names = "default";
gpios = <&cp0_gpio2 9 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
};
&ap_pinctrl {
ap_mmc0_pins: ap-mmc0-pins {
marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3", "mpp4", "mpp5",
"mpp6", "mpp7", "mpp8", "mpp9", "mpp10", "mpp12";
marvell,function = "sdio";
/*
* mpp12 is emmc reset, function should be sdio (hw_rst),
* but pinctrl-mvebu does not support this.
*
* From pinctrl-mvebu.h:
* "The name will be used to switch to this setting in DT description, e.g.
* marvell,function = "uart2". subname is only for debugging purposes."
*/
};
};
&ap_sdhci0 {
bus-width = <8>;
pinctrl-0 = <&ap_mmc0_pins>;
pinctrl-names = "default";
vqmmc-supply = <&v_1_8>;
no-sdio;
non-removable;
status = "okay";
};
&cp0_ethernet {
status = "okay";
Annotation
- Immediate include surface: `dt-bindings/gpio/gpio.h`.
- Atlas domain: Architecture Layer / arch/arm64.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.