arch/arm64/boot/dts/marvell/cn9131-db-comexpress.dtsi

Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/marvell/cn9131-db-comexpress.dtsi

File Facts

System
Linux kernel
Corpus path
arch/arm64/boot/dts/marvell/cn9131-db-comexpress.dtsi
Extension
.dtsi
Size
1767 bytes
Lines
110
Domain
Architecture Layer
Bucket
arch/arm64
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (C) 2023 Marvell International Ltd.
 *
 * Device tree for the CN9131-DB Com Express CPU module board.
 */

#include "cn9131-db.dtsi"

/ {
	model = "Marvell Armada CN9131-DB COM EXPRESS type 7 CPU module board";
	compatible = "marvell,cn9131-cpu-module", "marvell,cn9131", "marvell,cn9130",
		     "marvell,armada-ap807-quad", "marvell,armada-ap807";

};

&ap0_reg_sd_vccq {
	compatible = "regulator-fixed";
	regulator-max-microvolt = <1800000>;
	/delete-property/ states;
	/delete-property/ gpios;
};

&cp0_reg_usb3_vbus0 {
	/delete-property/ gpio;
};

&cp0_reg_usb3_vbus1 {
	/delete-property/ gpio;
};

&cp1_reg_usb3_vbus0 {
	/delete-property/ gpio;
};

&cp0_reg_sd_vcc {
	status = "disabled";
};

&cp0_reg_sd_vccq {
	status = "disabled";
};

&cp0_sdhci0 {
	status = "disabled";
};

&cp0_eth0 {
	status = "disabled";
};

&cp0_eth1 {
	status = "okay";
	phy = <&phy0>;
	phy-mode = "rgmii-id";
};

&cp0_eth2 {
	status = "disabled";
};

&cp0_mdio {
	status = "okay";
	pinctrl-0 = <&cp0_ge_mdio_pins>;
	phy0: ethernet-phy@0 {
		status = "okay";
	};
};

&cp0_syscon0 {

Annotation

Implementation Notes