arch/arm64/boot/dts/marvell/cn9132-db.dtsi

Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/marvell/cn9132-db.dtsi

File Facts

System
Linux kernel
Corpus path
arch/arm64/boot/dts/marvell/cn9132-db.dtsi
Extension
.dtsi
Size
4811 bytes
Lines
230
Domain
Architecture Layer
Bucket
arch/arm64
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (C) 2020 Marvell International Ltd.
 *
 * Device tree for the CN9132-DB board.
 */

#include "cn9131-db.dtsi"

/ {
	compatible = "marvell,cn9132", "marvell,cn9131", "marvell,cn9130",
		     "marvell,armada-ap807-quad", "marvell,armada-ap807";

	aliases {
		gpio5 = &cp2_gpio1;
		gpio6 = &cp2_gpio2;
		ethernet5 = &cp2_eth0;
	};

	cp2_reg_usb3_vbus0: regulator-7 {
		compatible = "regulator-fixed";
		regulator-name = "cp2-xhci0-vbus";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		enable-active-high;
		gpio = <&cp2_gpio1 2 GPIO_ACTIVE_HIGH>;
	};

	cp2_usb3_0_phy0: usb-phy-4 {
		compatible = "usb-nop-xceiv";
		#phy-cells = <0>;
		vcc-supply = <&cp2_reg_usb3_vbus0>;
	};

	cp2_reg_usb3_vbus1: regulator-8 {
		compatible = "regulator-fixed";
		regulator-name = "cp2-xhci1-vbus";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		enable-active-high;
		gpio = <&cp2_gpio1 3 GPIO_ACTIVE_HIGH>;
	};

	cp2_usb3_0_phy1: usb-phy-5 {
		compatible = "usb-nop-xceiv";
		#phy-cells = <0>;
		vcc-supply = <&cp2_reg_usb3_vbus1>;
	};

	cp2_reg_sd_vccq: regulator-9 {
		compatible = "regulator-gpio";
		regulator-name = "cp2_sd_vcc";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <3300000>;
		gpios = <&cp2_gpio2 17 GPIO_ACTIVE_HIGH>;
		states = <1800000 0x1 3300000 0x0>;
	};

	cp2_sfp_eth0: sfp-eth-3 {
		compatible = "sff,sfp";
		i2c-bus = <&cp2_sfpp0_i2c>;
		los-gpios = <&cp2_module_expander1 11 GPIO_ACTIVE_HIGH>;
		mod-def0-gpios = <&cp2_module_expander1 10 GPIO_ACTIVE_LOW>;
		tx-disable-gpios = <&cp2_module_expander1 9 GPIO_ACTIVE_HIGH>;
		tx-fault-gpios = <&cp2_module_expander1 8 GPIO_ACTIVE_HIGH>;
		/*
		 * SFP cages are unconnected on early PCBs because of an the I2C
		 * lanes not being connected. Prevent the port for being
		 * unusable by disabling the SFP node.
		 */

Annotation

Implementation Notes