arch/arm64/boot/dts/mediatek/mt6795.dtsi

Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/mediatek/mt6795.dtsi

File Facts

System
Linux kernel
Corpus path
arch/arm64/boot/dts/mediatek/mt6795.dtsi
Extension
.dtsi
Size
28631 bytes
Lines
1005
Domain
Architecture Layer
Bucket
arch/arm64
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (c) 2015 MediaTek Inc.
 * Copyright (C) 2023 Collabora Ltd.
 * Authors: Mars.C <mars.cheng@mediatek.com>
 *          AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
 */

#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/mediatek,mt6795-clk.h>
#include <dt-bindings/gce/mediatek,mt6795-gce.h>
#include <dt-bindings/memory/mt6795-larb-port.h>
#include <dt-bindings/pinctrl/mt6795-pinfunc.h>
#include <dt-bindings/power/mt6795-power.h>
#include <dt-bindings/reset/mediatek,mt6795-resets.h>

/ {
	compatible = "mediatek,mt6795";
	interrupt-parent = <&sysirq>;
	#address-cells = <2>;
	#size-cells = <2>;

	aliases {
		ovl0 = &ovl0;
		ovl1 = &ovl1;
		rdma0 = &rdma0;
		rdma1 = &rdma1;
		rdma2 = &rdma2;
		wdma0 = &wdma0;
		wdma1 = &wdma1;
		color0 = &color0;
		color1 = &color1;
		split0 = &split0;
		split1 = &split1;
		dpi0 = &dpi0;
		dsi0 = &dsi0;
		dsi1 = &dsi1;
	};

	psci {
		compatible = "arm,psci-0.2";
		method = "smc";
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu0: cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-a53";
			enable-method = "psci";
			reg = <0x000>;
			cci-control-port = <&cci_control2>;
			next-level-cache = <&l2_0>;
		};

		cpu1: cpu@1 {
			device_type = "cpu";
			compatible = "arm,cortex-a53";
			enable-method = "psci";
			reg = <0x001>;
			cci-control-port = <&cci_control2>;
			i-cache-size = <32768>;
			i-cache-line-size = <64>;
			i-cache-sets = <256>;
			d-cache-size = <32768>;
			d-cache-line-size = <64>;
			d-cache-sets = <128>;

Annotation

Implementation Notes