arch/arm64/boot/dts/mediatek/mt8183-kukui-audio-ts3a227e.dtsi
Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/mediatek/mt8183-kukui-audio-ts3a227e.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm64/boot/dts/mediatek/mt8183-kukui-audio-ts3a227e.dtsi- Extension
.dtsi- Size
- 562 bytes
- Lines
- 32
- Domain
- Architecture Layer
- Bucket
- arch/arm64
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* Google Kukui (and derivatives) audio fragment for ts3a227e.
*
* Copyright 2019 Google LLC.
*/
&i2c5 {
ts3a227e: ts3a227e@3b {
pinctrl-names = "default";
pinctrl-0 = <&ts3a227e_pins>;
compatible = "ti,ts3a227e";
reg = <0x3b>;
interrupts-extended = <&pio 157 IRQ_TYPE_LEVEL_LOW>;
status = "okay";
};
};
&pio {
ts3a227e_pins: ts3a227e-pins {
pins1 {
pinmux = <PINMUX_GPIO157__FUNC_GPIO157>;
input-enable;
bias-pull-up;
};
};
};
&sound {
mediatek,headset-codec = <&ts3a227e>;
};
Annotation
- Atlas domain: Architecture Layer / arch/arm64.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.