arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r1.dts
Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r1.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r1.dts- Extension
.dts- Size
- 544 bytes
- Lines
- 31
- Domain
- Architecture Layer
- Bucket
- arch/arm64
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
mt8195-cherry.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* Copyright (C) 2021 MediaTek Inc.
*/
/dts-v1/;
#include "mt8195-cherry.dtsi"
/ {
model = "Acer Tomato (rev1) board";
compatible = "google,tomato-rev1", "google,tomato", "mediatek,mt8195";
};
&audio_codec {
compatible = "realtek,rt5682i";
realtek,btndet-delay = <16>;
VBAT-supply = <&pp3300_z5>;
};
&sound {
compatible = "mediatek,mt8195_mt6359_rt1019_rt5682";
model = "mt8195_r1019_5682";
};
&ts_10 {
status = "okay";
};
&watchdog {
/delete-property/ mediatek,disable-extrst;
};
Annotation
- Immediate include surface: `mt8195-cherry.dtsi`.
- Atlas domain: Architecture Layer / arch/arm64.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.