arch/arm64/boot/dts/nvidia/tegra194-p3668.dtsi
Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/nvidia/tegra194-p3668.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm64/boot/dts/nvidia/tegra194-p3668.dtsi- Extension
.dtsi- Size
- 6527 bytes
- Lines
- 314
- Domain
- Architecture Layer
- Bucket
- arch/arm64
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
tegra194.dtsidt-bindings/mfd/max77620.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0
#include "tegra194.dtsi"
#include <dt-bindings/mfd/max77620.h>
/ {
aliases {
ethernet0 = "/bus@0/ethernet@2490000";
i2c0 = "/bpmp/i2c";
i2c1 = "/bus@0/i2c@3160000";
i2c2 = "/bus@0/i2c@c240000";
i2c3 = "/bus@0/i2c@3180000";
i2c4 = "/bus@0/i2c@3190000";
i2c5 = "/bus@0/i2c@31c0000";
i2c6 = "/bus@0/i2c@c250000";
i2c7 = "/bus@0/i2c@31e0000";
rtc0 = "/bpmp/i2c/pmic@3c";
rtc1 = "/bus@0/rtc@c2a0000";
serial0 = &tcu;
};
chosen {
bootargs = "console=ttyTCU0,115200n8";
stdout-path = "serial0:115200n8";
};
bus@0 {
ethernet@2490000 {
status = "okay";
phy-reset-gpios = <&gpio TEGRA194_MAIN_GPIO(R, 1) GPIO_ACTIVE_LOW>;
phy-handle = <&phy>;
phy-mode = "rgmii-id";
mdio {
#address-cells = <1>;
#size-cells = <0>;
phy: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x0>;
interrupt-parent = <&gpio>;
interrupts = <TEGRA194_MAIN_GPIO(G, 4) IRQ_TYPE_LEVEL_LOW>;
#phy-cells = <0>;
wakeup-source;
};
};
};
memory-controller@2c00000 {
status = "okay";
};
i2c@c250000 {
status = "okay";
power-sensor@40 {
compatible = "ti,ina3221";
reg = <0x40>;
#address-cells = <1>;
#size-cells = <0>;
input@0 {
reg = <0x0>;
label = "VDD_IN";
shunt-resistor-micro-ohms = <5000>;
};
input@1 {
reg = <0x1>;
label = "VDD_CPU_GPU_CV";
Annotation
- Immediate include surface: `tegra194.dtsi`, `dt-bindings/mfd/max77620.h`.
- Atlas domain: Architecture Layer / arch/arm64.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.