arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts
Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts- Extension
.dts- Size
- 24485 bytes
- Lines
- 1391
- Domain
- Architecture Layer
- Bucket
- arch/arm64
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
tegra210-p2180.dtsitegra210-p2597.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
#include "tegra210-p2180.dtsi"
#include "tegra210-p2597.dtsi"
/ {
model = "NVIDIA Jetson TX1 Developer Kit";
compatible = "nvidia,p2371-2180", "nvidia,tegra210";
pcie@1003000 {
status = "okay";
hvddio-pex-supply = <&vdd_1v8>;
dvddio-pex-supply = <&vdd_pex_1v05>;
vddio-pex-ctl-supply = <&vdd_1v8>;
pci@1,0 {
phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-0}>,
<&{/padctl@7009f000/pads/pcie/lanes/pcie-1}>,
<&{/padctl@7009f000/pads/pcie/lanes/pcie-2}>,
<&{/padctl@7009f000/pads/pcie/lanes/pcie-3}>;
phy-names = "pcie-0", "pcie-1", "pcie-2", "pcie-3";
status = "okay";
};
pci@2,0 {
phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-4}>;
phy-names = "pcie-0";
status = "okay";
};
};
host1x@50000000 {
dsi@54300000 {
status = "okay";
avdd-dsi-csi-supply = <&vdd_dsi_csi>;
panel@0 {
compatible = "auo,b080uan01";
reg = <0>;
enable-gpios = <&gpio TEGRA_GPIO(V, 2)
GPIO_ACTIVE_HIGH>;
power-supply = <&vdd_5v0_io>;
backlight = <&backlight>;
};
};
};
i2c@7000c400 {
backlight: backlight@2c {
compatible = "ti,lp8557";
reg = <0x2c>;
power-supply = <&vdd_3v3_sys>;
dev-ctrl = /bits/ 8 <0x80>;
init-brt = /bits/ 8 <0xff>;
pwms = <&pwm 0 29334>;
pwm-names = "lp8557";
/* boost frequency 1 MHz */
rom-13h {
rom-addr = /bits/ 8 <0x13>;
rom-val = /bits/ 8 <0x01>;
};
/* 3 LED string */
Annotation
- Immediate include surface: `tegra210-p2180.dtsi`, `tegra210-p2597.dtsi`.
- Atlas domain: Architecture Layer / arch/arm64.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.