arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts
Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts- Extension
.dts- Size
- 37790 bytes
- Lines
- 1994
- Domain
- Architecture Layer
- Bucket
- arch/arm64
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
dt-bindings/input/gpio-keys.hdt-bindings/input/linux-event-codes.hdt-bindings/mfd/max77620.htegra210.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
#include <dt-bindings/input/gpio-keys.h>
#include <dt-bindings/input/linux-event-codes.h>
#include <dt-bindings/mfd/max77620.h>
#include "tegra210.dtsi"
/ {
model = "NVIDIA Jetson Nano Developer Kit";
compatible = "nvidia,p3450-0000", "nvidia,tegra210";
aliases {
ethernet = "/pcie@1003000/pci@2,0/ethernet@0,0";
rtc0 = "/i2c@7000d000/pmic@3c";
rtc1 = "/rtc@7000e000";
serial0 = &uarta;
};
chosen {
stdout-path = "serial0:115200n8";
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
};
memory@80000000 {
device_type = "memory";
reg = <0x0 0x80000000 0x1 0x0>;
};
pcie@1003000 {
status = "okay";
hvddio-pex-supply = <&vdd_1v8>;
dvddio-pex-supply = <&vdd_pex_1v05>;
vddio-pex-ctl-supply = <&vdd_1v8>;
pci@1,0 {
phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-1}>,
<&{/padctl@7009f000/pads/pcie/lanes/pcie-2}>,
<&{/padctl@7009f000/pads/pcie/lanes/pcie-3}>,
<&{/padctl@7009f000/pads/pcie/lanes/pcie-4}>;
phy-names = "pcie-0", "pcie-1", "pcie-2", "pcie-3";
nvidia,num-lanes = <4>;
status = "okay";
};
pci@2,0 {
phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-0}>;
phy-names = "pcie-0";
status = "okay";
ethernet@0,0 {
reg = <0x000000 0 0 0 0>;
local-mac-address = [ 00 00 00 00 00 00 ];
};
};
};
host1x@50000000 {
dpaux@54040000 {
status = "okay";
};
vi@54080000 {
Annotation
- Immediate include surface: `dt-bindings/input/gpio-keys.h`, `dt-bindings/input/linux-event-codes.h`, `dt-bindings/mfd/max77620.h`, `tegra210.dtsi`.
- Atlas domain: Architecture Layer / arch/arm64.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.