arch/arm64/boot/dts/nvidia/tegra264.dtsi

Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/nvidia/tegra264.dtsi

File Facts

System
Linux kernel
Corpus path
arch/arm64/boot/dts/nvidia/tegra264.dtsi
Extension
.dtsi
Size
93613 bytes
Lines
4146
Domain
Architecture Layer
Bucket
arch/arm64
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause

#include <dt-bindings/clock/nvidia,tegra264.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/mailbox/tegra186-hsp.h>
#include <dt-bindings/memory/nvidia,tegra264.h>
#include <dt-bindings/power/nvidia,tegra264-bpmp.h>
#include <dt-bindings/reset/nvidia,tegra264.h>

/ {
	compatible = "nvidia,tegra264";
	interrupt-parent = <&gic>;
	#address-cells = <2>;
	#size-cells = <2>;

	reserved-memory {
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;

		shmem_bpmp: shmem@86070000 {
			compatible = "nvidia,tegra264-bpmp-shmem";
			reg = <0x0 0x86070000 0x0 0x2000>;
			no-map;
		};
	};

	/* SYSTEM MMIO */
	bus@0 {
		compatible = "simple-bus";

		#address-cells = <2>;
		#size-cells = <2>;

		ranges = <0x00 0x00000000 0x00 0x00000000 0x00 0x20000000>; /* MMIO (512 MiB) */

		misc@100000 {
			compatible = "nvidia,tegra234-misc";
			reg = <0x0 0x00100000 0x0 0x0f000>,
			      <0x0 0x0c140000 0x0 0x10000>;
		};

		timer@8000000 {
			compatible = "nvidia,tegra234-timer";
			reg = <0x0 0x08000000 0x0 0x140000>;
			interrupts = <GIC_SPI 773 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 774 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 775 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 776 IRQ_TYPE_LEVEL_HIGH>;
			status = "disabled";
		};

		aconnect@9000000 {
			compatible = "nvidia,tegra264-aconnect",
					"nvidia,tegra210-aconnect";
			clocks = <&bpmp TEGRA264_CLK_APE>,
				<&bpmp TEGRA264_CLK_ADSP>;
			clock-names = "ape", "apb2ape";
			power-domains = <&bpmp TEGRA264_POWER_DOMAIN_AUD>;
			status = "disabled";

			#address-cells = <2>;
			#size-cells = <2>;
			ranges = <0x0 0x9000000 0x0 0x9000000 0x0 0x2000000>;

			adma: dma-controller@9440000 {
				compatible = "nvidia,tegra264-adma";
				reg = <0x0 0x9440000 0x0 0xb0000>;
				interrupt-parent = <&agic_page0>;
				interrupts = <GIC_SPI 0x90 IRQ_TYPE_LEVEL_HIGH>,

Annotation

Implementation Notes