arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi

Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi

File Facts

System
Linux kernel
Corpus path
arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
Extension
.dtsi
Size
26064 bytes
Lines
1134
Domain
Architecture Layer
Bucket
arch/arm64
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (c) 2014-2016, The Linux Foundation. All rights reserved.
 */


#include "pm8994.dtsi"
#include "pmi8994.dtsi"
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
#include <dt-bindings/sound/qcom,q6afe.h>
#include <dt-bindings/sound/qcom,q6asm.h>
#include <dt-bindings/sound/qcom,wcd9335.h>

/*
 * GPIO name legend: proper name = the GPIO line is used as GPIO
 *         NC      = not connected (pin out but not routed from the chip to
 *                   anything the board)
 *         "[PER]" = pin is muxed for [peripheral] (not GPIO)
 *         LSEC    = Low Speed External Connector
 *         P HSEC  = Primary High Speed External Connector
 *         S HSEC  = Secondary High Speed External Connector
 *         J14     = Camera Connector
 *         TP      = Test Points
 *
 * Line names are taken from the schematic "DragonBoard 820c",
 * drawing no: LM25-P2751-1
 *
 * For the lines routed to the external connectors the
 * lines are named after the 96Boards CE Specification 1.0,
 * Appendix "Expansion Connector Signal Description".
 *
 * When the 96Board naming of a line and the schematic name of
 * the same line are in conflict, the 96Board specification
 * takes precedence, which means that the external UART on the
 * LSEC is named UART0 while the schematic and SoC names this
 * UART3. This is only for the informational lines i.e. "[FOO]",
 * the GPIO named lines "GPIO-A" thru "GPIO-L" are the only
 * ones actually used for GPIO.
 */

/ {
	aliases {
		serial0 = &blsp2_uart2;
		serial1 = &blsp2_uart3;
		serial2 = &blsp1_uart2;
		i2c0 = &blsp1_i2c3;
		i2c1 = &blsp2_i2c1;
		i2c2 = &blsp2_i2c1;
		spi0 = &blsp1_spi1;
		spi1 = &blsp2_spi6;
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};

	div1_mclk: divclk1 {
		compatible = "gpio-gate-clock";
		pinctrl-0 = <&audio_mclk>;
		pinctrl-names = "default";
		clocks = <&rpmcc RPM_SMD_DIV_CLK1>;
		#clock-cells = <0>;
		enable-gpios = <&pm8994_gpios 15 0>;
	};

	divclk4: divclk4 {
		compatible = "fixed-clock";

Annotation

Implementation Notes