arch/arm64/boot/dts/qcom/kaanapali-ipcc.h
Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/qcom/kaanapali-ipcc.h
File Facts
- System
- Linux kernel
- Corpus path
arch/arm64/boot/dts/qcom/kaanapali-ipcc.h- Extension
.h- Size
- 1526 bytes
- Lines
- 59
- Domain
- Architecture Layer
- Bucket
- arch/arm64
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef __DTS_KAANAPALI_MAILBOX_IPCC_H
#define __DTS_KAANAPALI_MAILBOX_IPCC_H
/* Physical client IDs */
#define IPCC_MPROC_AOP 0
#define IPCC_MPROC_TZ 1
#define IPCC_MPROC_MPSS 2
#define IPCC_MPROC_LPASS 3
#define IPCC_MPROC_SDC 4
#define IPCC_MPROC_CDSP 5
#define IPCC_MPROC_APSS 6
#define IPCC_MPROC_SOCCP 13
#define IPCC_MPROC_DCP 14
#define IPCC_MPROC_SPSS 15
#define IPCC_MPROC_TME 16
#define IPCC_MPROC_WPSS 17
#define IPCC_COMPUTE_L0_CDSP 2
#define IPCC_COMPUTE_L0_APSS 3
#define IPCC_COMPUTE_L0_GPU 4
#define IPCC_COMPUTE_L0_CVP 8
#define IPCC_COMPUTE_L0_CAM 9
#define IPCC_COMPUTE_L0_CAM1 10
#define IPCC_COMPUTE_L0_DCP 11
#define IPCC_COMPUTE_L0_VPU 12
#define IPCC_COMPUTE_L0_SOCCP 16
#define IPCC_COMPUTE_L1_CDSP 2
#define IPCC_COMPUTE_L1_APSS 3
#define IPCC_COMPUTE_L1_GPU 4
#define IPCC_COMPUTE_L1_CVP 8
#define IPCC_COMPUTE_L1_CAM 9
#define IPCC_COMPUTE_L1_CAM1 10
#define IPCC_COMPUTE_L1_DCP 11
#define IPCC_COMPUTE_L1_VPU 12
#define IPCC_COMPUTE_L1_SOCCP 16
#define IPCC_PERIPH_CDSP 2
#define IPCC_PERIPH_APSS 3
#define IPCC_PERIPH_PCIE0 4
#define IPCC_PERIPH_PCIE1 5
#define IPCC_FENCE_CDSP 2
#define IPCC_FENCE_APSS 3
#define IPCC_FENCE_GPU 4
#define IPCC_FENCE_CVP 8
#define IPCC_FENCE_CAM 8
#define IPCC_FENCE_CAM1 10
#define IPCC_FENCE_DCP 11
#define IPCC_FENCE_VPU 20
#define IPCC_FENCE_SOCCP 24
#endif
Annotation
- Atlas domain: Architecture Layer / arch/arm64.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.