arch/arm64/boot/dts/qcom/lemans-auto.dtsi
Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/qcom/lemans-auto.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm64/boot/dts/qcom/lemans-auto.dtsi- Extension
.dtsi- Size
- 2019 bytes
- Lines
- 105
- Domain
- Architecture Layer
- Bucket
- arch/arm64
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
lemans.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2023, Linaro Limited
*/
/dts-v1/;
#include "lemans.dtsi"
/delete-node/ &pil_camera_mem;
/delete-node/ &pil_adsp_mem;
/delete-node/ &q6_adsp_dtb_mem;
/delete-node/ &q6_gdsp0_dtb_mem;
/delete-node/ &pil_gdsp0_mem;
/delete-node/ &pil_gdsp1_mem;
/delete-node/ &q6_gdsp1_dtb_mem;
/delete-node/ &q6_cdsp0_dtb_mem;
/delete-node/ &pil_cdsp0_mem;
/delete-node/ &pil_gpu_mem;
/delete-node/ &pil_cdsp1_mem;
/delete-node/ &q6_cdsp1_dtb_mem;
/delete-node/ &pil_cvp_mem;
/delete-node/ &pil_video_mem;
/delete-node/ &gunyah_md_mem;
/ {
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
tz_ffi_mem: tz-ffi@91c00000 {
compatible = "shared-dma-pool";
reg = <0x0 0x91c00000 0x0 0x1400000>;
no-map;
};
pil_camera_mem: pil-camera@95200000 {
reg = <0x0 0x95200000 0x0 0x500000>;
no-map;
};
pil_adsp_mem: pil-adsp@95c00000 {
reg = <0x0 0x95c00000 0x0 0x1e00000>;
no-map;
};
pil_gdsp0_mem: pil-gdsp0@97b00000 {
reg = <0x0 0x97b00000 0x0 0x1e00000>;
no-map;
};
pil_gdsp1_mem: pil-gdsp1@99900000 {
reg = <0x0 0x99900000 0x0 0x1e00000>;
no-map;
};
pil_cdsp0_mem: pil-cdsp0@9b800000 {
reg = <0x0 0x9b800000 0x0 0x1e00000>;
no-map;
};
pil_gpu_mem: pil-gpu@9d600000 {
reg = <0x0 0x9d600000 0x0 0x2000>;
no-map;
};
pil_cdsp1_mem: pil-cdsp1@9d700000 {
reg = <0x0 0x9d700000 0x0 0x1e00000>;
no-map;
Annotation
- Immediate include surface: `lemans.dtsi`.
- Atlas domain: Architecture Layer / arch/arm64.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.