arch/arm64/boot/dts/qcom/pm8150b.dtsi
Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/qcom/pm8150b.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm64/boot/dts/qcom/pm8150b.dtsi- Extension
.dtsi- Size
- 4069 bytes
- Lines
- 181
- Domain
- Architecture Layer
- Bucket
- arch/arm64
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
dt-bindings/iio/qcom,spmi-vadc.hdt-bindings/interrupt-controller/irq.hdt-bindings/spmi/spmi.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
* Copyright (c) 2019, Linaro Limited
*/
#include <dt-bindings/iio/qcom,spmi-vadc.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/spmi/spmi.h>
/ {
thermal-zones {
pm8150b-thermal {
polling-delay-passive = <100>;
thermal-sensors = <&pm8150b_temp>;
trips {
trip0 {
temperature = <95000>;
hysteresis = <0>;
type = "passive";
};
trip1 {
temperature = <115000>;
hysteresis = <0>;
type = "hot";
};
trip2 {
temperature = <145000>;
hysteresis = <0>;
type = "critical";
};
};
};
};
};
&spmi_bus {
pmic@2 {
compatible = "qcom,pm8150b", "qcom,spmi-pmic";
reg = <0x2 SPMI_USID>;
#address-cells = <1>;
#size-cells = <0>;
pon@800 {
compatible = "qcom,pm8916-pon";
reg = <0x0800>;
status = "disabled";
};
pm8150b_vbus: usb-vbus-regulator@1100 {
compatible = "qcom,pm8150b-vbus-reg";
status = "disabled";
reg = <0x1100>;
};
pm8150b_typec: typec@1500 {
compatible = "qcom,pm8150b-typec";
status = "disabled";
reg = <0x1500>,
<0x1700>;
interrupts = <0x2 0x15 0x00 IRQ_TYPE_EDGE_RISING>,
<0x2 0x15 0x01 IRQ_TYPE_EDGE_BOTH>,
<0x2 0x15 0x02 IRQ_TYPE_EDGE_RISING>,
<0x2 0x15 0x03 IRQ_TYPE_EDGE_BOTH>,
<0x2 0x15 0x04 IRQ_TYPE_EDGE_RISING>,
Annotation
- Immediate include surface: `dt-bindings/iio/qcom,spmi-vadc.h`, `dt-bindings/interrupt-controller/irq.h`, `dt-bindings/spmi/spmi.h`.
- Atlas domain: Architecture Layer / arch/arm64.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.