arch/arm64/boot/dts/qcom/qcs404.dtsi

Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/qcom/qcs404.dtsi

File Facts

System
Linux kernel
Corpus path
arch/arm64/boot/dts/qcom/qcs404.dtsi
Extension
.dtsi
Size
44015 bytes
Lines
1842
Domain
Architecture Layer
Bucket
arch/arm64
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (c) 2018, Linaro Limited
 */

#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/qcom,gcc-qcs404.h>
#include <dt-bindings/clock/qcom,turingcc-qcs404.h>
#include <dt-bindings/clock/qcom,rpmcc.h>
#include <dt-bindings/power/qcom-rpmpd.h>
#include <dt-bindings/thermal/thermal.h>

/ {
	interrupt-parent = <&intc>;

	#address-cells = <2>;
	#size-cells = <2>;

	chosen { };

	clocks {
		xo_board: xo-board {
			compatible = "fixed-clock";
			#clock-cells = <0>;
			clock-frequency = <19200000>;
		};

		sleep_clk: sleep-clk {
			compatible = "fixed-clock";
			#clock-cells = <0>;
			clock-frequency = <32764>;
		};
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu0: cpu@100 {
			device_type = "cpu";
			compatible = "arm,cortex-a53";
			reg = <0x100>;
			enable-method = "psci";
			cpu-idle-states = <&cpu_sleep_0>;
			next-level-cache = <&l2_0>;
			#cooling-cells = <2>;
			clocks = <&apcs_glb>;
			operating-points-v2 = <&cpu_opp_table>;
			power-domains = <&cpr>;
			power-domain-names = "cpr";
		};

		cpu1: cpu@101 {
			device_type = "cpu";
			compatible = "arm,cortex-a53";
			reg = <0x101>;
			enable-method = "psci";
			cpu-idle-states = <&cpu_sleep_0>;
			next-level-cache = <&l2_0>;
			#cooling-cells = <2>;
			clocks = <&apcs_glb>;
			operating-points-v2 = <&cpu_opp_table>;
			power-domains = <&cpr>;
			power-domain-names = "cpr";
		};

		cpu2: cpu@102 {
			device_type = "cpu";
			compatible = "arm,cortex-a53";
			reg = <0x102>;

Annotation

Implementation Notes