arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts
Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts- Extension
.dts- Size
- 7002 bytes
- Lines
- 378
- Domain
- Architecture Layer
- Bucket
- arch/arm64
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
sc7280-herobrine.dtsisc7280-herobrine-audio-wcd9385.dtsisc7280-herobrine-lte-sku.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* sc7280 CRD 3+ board device tree source
*
* Copyright 2022 Google LLC.
*/
/dts-v1/;
#include "sc7280-herobrine.dtsi"
#include "sc7280-herobrine-audio-wcd9385.dtsi"
#include "sc7280-herobrine-lte-sku.dtsi"
/ {
model = "Qualcomm Technologies, Inc. sc7280 CRD platform (rev5+)";
compatible = "google,zoglin", "google,hoglin", "qcom,sc7280";
/* FIXED REGULATORS */
/*
* On most herobrine boards PPVAR_SYS directly provides VREG_EDP_BL.
* However, on CRD there's an extra regulator in the way. Since this
* is expected to be uncommon, we'll leave the "vreg_edp_bl" label
* in the baseboard herobrine.dtsi point at "ppvar_sys" and then
* make a "_crd" specific version here.
*/
vreg_edp_bl_crd: vreg-edp-bl-crd-regulator {
compatible = "regulator-fixed";
regulator-name = "vreg_edp_bl_crd";
gpio = <&pm8350c_gpios 6 GPIO_ACTIVE_HIGH>;
enable-active-high;
pinctrl-names = "default";
pinctrl-0 = <&edp_bl_reg_en>;
vin-supply = <&ppvar_sys>;
};
};
/* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */
&apps_rsc {
regulators-2 {
compatible = "qcom,pmg1110-rpmh-regulators";
qcom,pmic-id = "k";
vreg_s1k_1p0: smps1 {
regulator-min-microvolt = <1010000>;
regulator-max-microvolt = <1170000>;
};
};
};
ap_tp_i2c: &i2c0 {
status = "okay";
clock-frequency = <400000>;
trackpad: trackpad@15 {
compatible = "hid-over-i2c";
reg = <0x15>;
pinctrl-names = "default";
pinctrl-0 = <&tp_int_odl>;
interrupt-parent = <&tlmm>;
interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
post-power-on-delay-ms = <20>;
hid-descr-addr = <0x0001>;
vdd-supply = <&pp3300_z1>;
Annotation
- Immediate include surface: `sc7280-herobrine.dtsi`, `sc7280-herobrine-audio-wcd9385.dtsi`, `sc7280-herobrine-lte-sku.dtsi`.
- Atlas domain: Architecture Layer / arch/arm64.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.