arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi
Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi- Extension
.dtsi- Size
- 20002 bytes
- Lines
- 944
- Domain
- Architecture Layer
- Bucket
- arch/arm64
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
dt-bindings/input/gpio-keys.hdt-bindings/input/input.hdt-bindings/leds/common.hsc7280-qcard.dtsisc7280-chrome-common.dtsiarm/cros-ec-keyboard.dtsiarm/cros-ec-sbs.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google Herobrine baseboard device tree source
*
* The set of things in this file is a bit loosely defined. It's roughly
* defined as the set of things that the child boards happen to have in
* common. Since all of the child boards started from the same original
* design this is hopefully a large set of things but as more derivatives
* appear things may "bubble down" out of this file. For things that are
* part of the reference design but might not exist on child nodes we will
* follow the lead of the SoC dtsi files and leave their status as "disabled".
*
* Copyright 2022 Google LLC.
*/
#include <dt-bindings/input/gpio-keys.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include "sc7280-qcard.dtsi"
#include "sc7280-chrome-common.dtsi"
/ {
chosen {
stdout-path = "serial0:115200n8";
};
/*
* FIXED REGULATORS
*
* Sort order:
* 1. parents above children.
* 2. higher voltage above lower voltage.
* 3. alphabetically by node name.
*/
/* This is the top level supply and variable voltage */
ppvar_sys: ppvar-sys-regulator {
compatible = "regulator-fixed";
regulator-name = "ppvar_sys";
regulator-always-on;
regulator-boot-on;
};
/* This divides ppvar_sys by 2, so voltage is variable */
src_vph_pwr: src-vph-pwr-regulator {
compatible = "regulator-fixed";
regulator-name = "src_vph_pwr";
/* EC turns on with switchcap_on; always on for AP */
regulator-always-on;
regulator-boot-on;
vin-supply = <&ppvar_sys>;
};
pp5000_s5: pp5000-s5-regulator {
compatible = "regulator-fixed";
regulator-name = "pp5000_s5";
/* EC turns on with en_pp5000_s5; always on for AP */
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&ppvar_sys>;
};
pp3300_z1: pp3300-z1-regulator {
Annotation
- Immediate include surface: `dt-bindings/input/gpio-keys.h`, `dt-bindings/input/input.h`, `dt-bindings/leds/common.h`, `sc7280-qcard.dtsi`, `sc7280-chrome-common.dtsi`, `arm/cros-ec-keyboard.dtsi`, `arm/cros-ec-sbs.dtsi`.
- Atlas domain: Architecture Layer / arch/arm64.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.