arch/arm64/boot/dts/qcom/sc7280-herobrine-nvme-sku.dtsi

File Facts

System

Linux kernel

Corpus path

arch/arm64/boot/dts/qcom/sc7280-herobrine-nvme-sku.dtsi

Extension

.dtsi

Size

199 bytes

Lines

15

Domain

Architecture Layer

Bucket

arch/arm64

Inferred role

Architecture Layer: configuration, schema, or hardware description

Status

atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

• CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

• No C-style include directives detected by the generator.

Detected Declarations

• No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Google Herobrine dts fragment for NVMe SKUs
 *
 * Copyright 2022 Google LLC.
 */

&pcie1 {
	status = "okay";
};

&pcie1_phy {
	status = "okay";
};

Annotation

• Atlas domain: Architecture Layer / arch/arm64.
• Implementation status: atlas-only.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.