arch/arm64/boot/dts/qcom/sc7280-idp-ec-h1.dtsi
Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/qcom/sc7280-idp-ec-h1.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm64/boot/dts/qcom/sc7280-idp-ec-h1.dtsi- Extension
.dtsi- Size
- 2245 bytes
- Lines
- 107
- Domain
- Architecture Layer
- Bucket
- arch/arm64
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
arm/cros-ec-keyboard.dtsiarm/cros-ec-sbs.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: BSD-3-Clause
/*
* sc7280 EC/H1 over SPI (common between IDP2 and CRD)
*
* Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
*/
ap_ec_spi: &spi10 {
status = "okay";
pinctrl-0 = <&qup_spi10_data_clk>, <&qup_spi10_cs_gpio_init_high>, <&qup_spi10_cs_gpio>;
cs-gpios = <&tlmm 43 GPIO_ACTIVE_LOW>;
cros_ec: ec@0 {
compatible = "google,cros-ec-spi";
reg = <0>;
interrupt-parent = <&tlmm>;
interrupts = <18 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&ap_ec_int_l>;
spi-max-frequency = <3000000>;
wakeup-source;
cros_ec_pwm: pwm {
compatible = "google,cros-ec-pwm";
#pwm-cells = <1>;
};
i2c_tunnel: i2c-tunnel {
compatible = "google,cros-ec-i2c-tunnel";
google,remote-bus = <0>;
#address-cells = <1>;
#size-cells = <0>;
};
typec {
compatible = "google,cros-ec-typec";
#address-cells = <1>;
#size-cells = <0>;
usb_c0: connector@0 {
compatible = "usb-c-connector";
reg = <0>;
label = "left";
power-role = "dual";
data-role = "host";
try-power-role = "source";
};
usb_c1: connector@1 {
compatible = "usb-c-connector";
reg = <1>;
label = "right";
power-role = "dual";
data-role = "host";
try-power-role = "source";
};
};
};
};
#include <arm/cros-ec-keyboard.dtsi>
#include <arm/cros-ec-sbs.dtsi>
ap_h1_spi: &spi14 {
status = "okay";
pinctrl-0 = <&qup_spi14_data_clk>, <&qup_spi14_cs_gpio_init_high>, <&qup_spi14_cs_gpio>;
cs-gpios = <&tlmm 59 GPIO_ACTIVE_LOW>;
Annotation
- Immediate include surface: `arm/cros-ec-keyboard.dtsi`, `arm/cros-ec-sbs.dtsi`.
- Atlas domain: Architecture Layer / arch/arm64.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.