arch/arm64/boot/dts/qcom/sdm670-google-bonito-tianma.dts
Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/qcom/sdm670-google-bonito-tianma.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/arm64/boot/dts/qcom/sdm670-google-bonito-tianma.dts- Extension
.dts- Size
- 560 bytes
- Lines
- 33
- Domain
- Architecture Layer
- Bucket
- arch/arm64
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
sdm670-google-common.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-only
/*
* Device tree for Google Pixel 3a XL with the Tianma panel.
*
* Copyright (c) Richard Acayan. All rights reserved.
*/
/dts-v1/;
#include "sdm670-google-common.dtsi"
/ {
model = "Google Pixel 3a XL (with Tianma panel)";
compatible = "google,bonito-tianma", "google,bonito", "qcom,sdm670";
};
&battery {
charge-full-design-microamp-hours = <3700000>;
};
&framebuffer {
height = <2160>;
};
&panel {
compatible = "novatek,nt37700f";
};
&rmi4_f12 {
touchscreen-x-mm = <69>;
touchscreen-y-mm = <137>;
};
Annotation
- Immediate include surface: `sdm670-google-common.dtsi`.
- Atlas domain: Architecture Layer / arch/arm64.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.