arch/arm64/boot/dts/qcom/sm6375.dtsi
Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/qcom/sm6375.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm64/boot/dts/qcom/sm6375.dtsi- Extension
.dtsi- Size
- 59539 bytes
- Lines
- 2478
- Domain
- Architecture Layer
- Bucket
- arch/arm64
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
dt-bindings/clock/qcom,rpmcc.hdt-bindings/clock/qcom,sm6375-gcc.hdt-bindings/clock/qcom,sm6375-gpucc.hdt-bindings/dma/qcom-gpi.hdt-bindings/firmware/qcom,scm.hdt-bindings/interconnect/qcom,osm-l3.hdt-bindings/interrupt-controller/arm-gic.hdt-bindings/mailbox/qcom-ipcc.hdt-bindings/power/qcom-rpmpd.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2022, Konrad Dybcio <konrad.dybcio@somainline.org>
*/
#include <dt-bindings/clock/qcom,rpmcc.h>
#include <dt-bindings/clock/qcom,sm6375-gcc.h>
#include <dt-bindings/clock/qcom,sm6375-gpucc.h>
#include <dt-bindings/dma/qcom-gpi.h>
#include <dt-bindings/firmware/qcom,scm.h>
#include <dt-bindings/interconnect/qcom,osm-l3.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/mailbox/qcom-ipcc.h>
#include <dt-bindings/power/qcom-rpmpd.h>
/ {
interrupt-parent = <&intc>;
#address-cells = <2>;
#size-cells = <2>;
chosen { };
clocks {
xo_board_clk: xo-board-clk {
compatible = "fixed-clock";
#clock-cells = <0>;
};
sleep_clk: sleep-clk {
compatible = "fixed-clock";
clock-frequency = <32764>;
#clock-cells = <0>;
};
};
cpus {
#address-cells = <2>;
#size-cells = <0>;
cpu0: cpu@0 {
device_type = "cpu";
compatible = "qcom,kryo660";
reg = <0x0 0x0>;
clocks = <&cpufreq_hw 0>;
enable-method = "psci";
next-level-cache = <&l2_0>;
qcom,freq-domain = <&cpufreq_hw 0>;
operating-points-v2 = <&cpu0_opp_table>;
interconnects = <&cpucp_l3 MASTER_EPSS_L3_APPS &cpucp_l3 SLAVE_EPSS_L3_SHARED>;
power-domains = <&cpu_pd0>;
power-domain-names = "psci";
#cooling-cells = <2>;
l2_0: l2-cache {
compatible = "cache";
cache-level = <2>;
cache-unified;
next-level-cache = <&l3_0>;
l3_0: l3-cache {
compatible = "cache";
cache-level = <3>;
cache-unified;
};
};
};
cpu1: cpu@100 {
device_type = "cpu";
compatible = "qcom,kryo660";
reg = <0x0 0x100>;
Annotation
- Immediate include surface: `dt-bindings/clock/qcom,rpmcc.h`, `dt-bindings/clock/qcom,sm6375-gcc.h`, `dt-bindings/clock/qcom,sm6375-gpucc.h`, `dt-bindings/dma/qcom-gpi.h`, `dt-bindings/firmware/qcom,scm.h`, `dt-bindings/interconnect/qcom,osm-l3.h`, `dt-bindings/interrupt-controller/arm-gic.h`, `dt-bindings/mailbox/qcom-ipcc.h`.
- Atlas domain: Architecture Layer / arch/arm64.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.