arch/arm64/boot/dts/qcom/x1-el2.dtso
Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/qcom/x1-el2.dtso
File Facts
- System
- Linux kernel
- Corpus path
arch/arm64/boot/dts/qcom/x1-el2.dtso- Extension
.dtso- Size
- 1352 bytes
- Lines
- 70
- Domain
- Architecture Layer
- Bucket
- arch/arm64
- Inferred role
- Architecture Layer: arch/arm64
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: BSD-3-Clause
/*
* x1 specific modifications required to boot in EL2.
*/
/dts-v1/;
/plugin/;
&apss_watchdog {
status = "okay";
};
/* We can't and don't need to use zap shader in EL2 as linux can zap the gpu on it's own. */
&gpu_zap_shader {
status = "disabled";
};
&iris {
/* TODO: Add video-firmware iommus to start IRIS from EL2 */
status = "disabled";
};
/*
* When running under Gunyah, this IOMMU is controlled by the firmware,
* however when we take ownership of it in EL2, we need to configure
* it properly to use PCIe.
*
* Additionally, it seems like ITS emulation in Gunyah is broken so we
* can't use MSI on some PCIe controllers in EL1. But we can add them
* here for EL2.
*/
&pcie3 {
iommu-map = <0 &pcie_smmu 0x30000 0x10000>;
msi-map = <0 &gic_its 0xb0000 0x10000>;
};
&pcie4 {
iommu-map = <0 &pcie_smmu 0x40000 0x10000>;
};
&pcie5 {
iommu-map = <0 &pcie_smmu 0x50000 0x10000>;
msi-map = <0 &gic_its 0xd0000 0x10000>;
};
&pcie6a {
iommu-map = <0 &pcie_smmu 0x60000 0x10000>;
};
&pcie_smmu {
status = "okay";
};
&remoteproc_adsp {
iommus = <&apps_smmu 0x1000 0x80>;
};
&remoteproc_cdsp {
iommus = <&apps_smmu 0x0c00 0x0>;
};
/*
* The "SBSA watchdog" is implemented in software in Gunyah
* and can't be used when running in EL2.
*/
&sbsa_watchdog {
status = "disabled";
};
Annotation
- Atlas domain: Architecture Layer / arch/arm64.
- Implementation status: atlas-only.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.