arch/arm64/boot/dts/realtek/rtd16xx.dtsi

Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/realtek/rtd16xx.dtsi

File Facts

System
Linux kernel
Corpus path
arch/arm64/boot/dts/realtek/rtd16xx.dtsi
Extension
.dtsi
Size
4790 bytes
Lines
234
Domain
Architecture Layer
Bucket
arch/arm64
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
/*
 * Realtek RTD16xx SoC family
 *
 * Copyright (c) 2019 Realtek Semiconductor Corp.
 * Copyright (c) 2019 Andreas Färber
 */

#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>

/ {
	interrupt-parent = <&gic>;
	#address-cells = <1>;
	#size-cells = <1>;

	reserved-memory {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		rpc_comm: rpc@2f000 {
			reg = <0x2f000 0x1000>;
		};

		rpc_ringbuf: rpc@1ffe000 {
			reg = <0x1ffe000 0x4000>;
		};

		tee: tee@10100000 {
			reg = <0x10100000 0xf00000>;
			no-map;
		};
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu0: cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-a55";
			reg = <0x0>;
			enable-method = "psci";
			next-level-cache = <&l2>;
		};

		cpu1: cpu@100 {
			device_type = "cpu";
			compatible = "arm,cortex-a55";
			reg = <0x100>;
			enable-method = "psci";
			next-level-cache = <&l3>;
		};

		cpu2: cpu@200 {
			device_type = "cpu";
			compatible = "arm,cortex-a55";
			reg = <0x200>;
			enable-method = "psci";
			next-level-cache = <&l3>;
		};

		cpu3: cpu@300 {
			device_type = "cpu";
			compatible = "arm,cortex-a55";
			reg = <0x300>;
			enable-method = "psci";
			next-level-cache = <&l3>;
		};

Annotation

Implementation Notes