arch/arm64/boot/dts/renesas/r8a774c0.dtsi
Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/renesas/r8a774c0.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm64/boot/dts/renesas/r8a774c0.dtsi- Extension
.dtsi- Size
- 59349 bytes
- Lines
- 2023
- Domain
- Architecture Layer
- Bucket
- arch/arm64
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
dt-bindings/clock/r8a774c0-cpg-mssr.hdt-bindings/interrupt-controller/arm-gic.hdt-bindings/power/r8a774c0-sysc.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source for the RZ/G2E (R8A774C0) SoC
*
* Copyright (C) 2018-2019 Renesas Electronics Corp.
*/
#include <dt-bindings/clock/r8a774c0-cpg-mssr.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/power/r8a774c0-sysc.h>
/ {
compatible = "renesas,r8a774c0";
#address-cells = <2>;
#size-cells = <2>;
interrupt-parent = <&gic>;
/*
* The external audio clocks are configured as 0 Hz fixed frequency
* clocks by default.
* Boards that provide audio clocks should override them.
*/
audio_clk_a: audio_clk_a {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
audio_clk_b: audio_clk_b {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
audio_clk_c: audio_clk_c {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
/* External CAN clock - to be overridden by boards that provide it */
can_clk: can {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
cluster1_opp: opp-table-1 {
compatible = "operating-points-v2";
opp-shared;
opp-800000000 {
opp-hz = /bits/ 64 <800000000>;
opp-microvolt = <1030000>;
clock-latency-ns = <300000>;
};
opp-1000000000 {
opp-hz = /bits/ 64 <1000000000>;
opp-microvolt = <1030000>;
clock-latency-ns = <300000>;
};
opp-1200000000 {
opp-hz = /bits/ 64 <1200000000>;
opp-microvolt = <1030000>;
clock-latency-ns = <300000>;
opp-suspend;
};
};
cpus {
Annotation
- Immediate include surface: `dt-bindings/clock/r8a774c0-cpg-mssr.h`, `dt-bindings/interrupt-controller/arm-gic.h`, `dt-bindings/power/r8a774c0-sysc.h`.
- Atlas domain: Architecture Layer / arch/arm64.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.