arch/arm64/boot/dts/renesas/r8a779h0.dtsi
Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/renesas/r8a779h0.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm64/boot/dts/renesas/r8a779h0.dtsi- Extension
.dtsi- Size
- 63034 bytes
- Lines
- 2346
- Domain
- Architecture Layer
- Bucket
- arch/arm64
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
dt-bindings/clock/renesas,r8a779h0-cpg-mssr.hdt-bindings/interrupt-controller/arm-gic.hdt-bindings/power/renesas,r8a779h0-sysc.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
/*
* Device Tree Source for the R-Car V4M (R8A779H0) SoC
*
* Copyright (C) 2023 Renesas Electronics Corp.
*/
#include <dt-bindings/clock/renesas,r8a779h0-cpg-mssr.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/power/renesas,r8a779h0-sysc.h>
/ {
compatible = "renesas,r8a779h0";
#address-cells = <2>;
#size-cells = <2>;
interrupt-parent = <&gic>;
/* External Audio clock - to be overridden by boards that provide it */
audio_clkin: audio_clkin {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
/* External CAN clock - to be overridden by boards that provide it */
can_clk: can-clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
cluster0_opp: opp-table-0 {
compatible = "operating-points-v2";
opp-500000000 {
opp-hz = /bits/ 64 <500000000>;
opp-microvolt = <825000>;
clock-latency-ns = <500000>;
};
opp-1000000000 {
opp-hz = /bits/ 64 <1000000000>;
opp-microvolt = <825000>;
clock-latency-ns = <500000>;
};
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu-map {
cluster0 {
core0 {
cpu = <&a76_0>;
};
core1 {
cpu = <&a76_1>;
};
core2 {
cpu = <&a76_2>;
};
core3 {
cpu = <&a76_3>;
};
};
};
a76_0: cpu@0 {
compatible = "arm,cortex-a76";
reg = <0>;
Annotation
- Immediate include surface: `dt-bindings/clock/renesas,r8a779h0-cpg-mssr.h`, `dt-bindings/interrupt-controller/arm-gic.h`, `dt-bindings/power/renesas,r8a779h0-sysc.h`.
- Atlas domain: Architecture Layer / arch/arm64.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.