arch/arm64/boot/dts/renesas/r9a09g056.dtsi

Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/renesas/r9a09g056.dtsi

File Facts

System
Linux kernel
Corpus path
arch/arm64/boot/dts/renesas/r9a09g056.dtsi
Extension
.dtsi
Size
59002 bytes
Lines
1848
Domain
Architecture Layer
Bucket
arch/arm64
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
/*
 * Device Tree Source for the RZ/V2N SoC
 *
 * Copyright (C) 2025 Renesas Electronics Corp.
 */

#include <dt-bindings/clock/renesas,r9a09g056-cpg.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>

/* RZV2N_Px = Offset address of PFC_P_mn  - 0x20 */
#define RZV2N_P0	0
#define RZV2N_P1	1
#define RZV2N_P2	2
#define RZV2N_P3	3
#define RZV2N_P4	4
#define RZV2N_P5	5
#define RZV2N_P6	6
#define RZV2N_P7	7
#define RZV2N_P8	8
#define RZV2N_P9	9
#define RZV2N_PA	10
#define RZV2N_PB	11

#define RZV2N_PORT_PINMUX(b, p, f)	RZG2L_PORT_PINMUX(RZV2N_P##b, p, f)
#define RZV2N_GPIO(port, pin)		RZG2L_GPIO(RZV2N_P##port, pin)

/ {
	compatible = "renesas,r9a09g056";
	#address-cells = <2>;
	#size-cells = <2>;
	interrupt-parent = <&gic>;

	audio_extal_clk: audio-clk {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		/* This value must be overridden by the board */
		clock-frequency = <0>;
	};

	/*
	 * The default cluster table is based on the assumption that the PLLCA55 clock
	 * frequency is set to 1.7GHz. The PLLCA55 clock frequency can be set to
	 * 1.7/1.6/1.5/1.1 GHz based on the BOOTPLLCA_0/1 pins (and additionally can be
	 * clocked to 1.8GHz as well). The table below should be overridden in the board
	 * DTS based on the PLLCA55 clock frequency.
	 */
	cluster0_opp: opp-table-0 {
		compatible = "operating-points-v2";

		opp-1700000000 {
			opp-hz = /bits/ 64 <1700000000>;
			opp-microvolt = <900000>;
			clock-latency-ns = <300000>;
		};
		opp-850000000 {
			opp-hz = /bits/ 64 <850000000>;
			opp-microvolt = <800000>;
			clock-latency-ns = <300000>;
		};
		opp-425000000 {
			opp-hz = /bits/ 64 <425000000>;
			opp-microvolt = <800000>;
			clock-latency-ns = <300000>;
		};
		opp-212500000 {
			opp-hz = /bits/ 64 <212500000>;
			opp-microvolt = <800000>;
			clock-latency-ns = <300000>;

Annotation

Implementation Notes