arch/arm64/boot/dts/renesas/r9a09g056n48-rzv2n-evk.dts
Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/renesas/r9a09g056n48-rzv2n-evk.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/arm64/boot/dts/renesas/r9a09g056n48-rzv2n-evk.dts- Extension
.dts- Size
- 10090 bytes
- Lines
- 566
- Domain
- Architecture Layer
- Bucket
- arch/arm64
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
dt-bindings/gpio/gpio.hdt-bindings/input/input.hr9a09g056.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
/*
* Device Tree Source for the RZ/V2N EVK board
*
* Copyright (C) 2025 Renesas Electronics Corp.
*/
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "r9a09g056.dtsi"
/ {
model = "Renesas RZ/V2N EVK Board based on r9a09g056n48";
compatible = "renesas,rzv2n-evk", "renesas,r9a09g056n48", "renesas,r9a09g056";
aliases {
ethernet0 = ð0;
ethernet1 = ð1;
i2c0 = &i2c0;
i2c1 = &i2c1;
i2c2 = &i2c2;
i2c3 = &i2c3;
i2c6 = &i2c6;
i2c7 = &i2c7;
i2c8 = &i2c8;
mmc1 = &sdhi1;
rtc0 = &rtc;
serial0 = &scif;
};
chosen {
bootargs = "ignore_loglevel";
stdout-path = "serial0:115200n8";
};
hdmi-out {
compatible = "hdmi-connector";
type = "d";
port {
hdmi_con_out: endpoint {
remote-endpoint = <&adv7535_out>;
};
};
};
keys: keys {
compatible = "gpio-keys";
key-wakeup {
interrupts-extended = <&icu 0 IRQ_TYPE_EDGE_FALLING>;
linux,code = <KEY_WAKEUP>;
label = "NMI_SW";
debounce-interval = <20>;
wakeup-source;
};
};
memory@48000000 {
device_type = "memory";
/* first 128MB is reserved for secure area. */
reg = <0x0 0x48000000 0x1 0xf8000000>;
};
pcie_refclk: clock-pcie-ref {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <100000000>;
Annotation
- Immediate include surface: `dt-bindings/gpio/gpio.h`, `dt-bindings/input/input.h`, `r9a09g056.dtsi`.
- Atlas domain: Architecture Layer / arch/arm64.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.