arch/arm64/boot/dts/renesas/rzg2lc-smarc-pinfunction.dtsi

Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/renesas/rzg2lc-smarc-pinfunction.dtsi

File Facts

System
Linux kernel
Corpus path
arch/arm64/boot/dts/renesas/rzg2lc-smarc-pinfunction.dtsi
Extension
.dtsi
Size
3228 bytes
Lines
144
Domain
Architecture Layer
Bucket
arch/arm64
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
/*
 * Device Tree Source for the RZ/G2LC SMARC pincontrol parts
 *
 * Copyright (C) 2021 Renesas Electronics Corp.
 */

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>

&pinctrl {
	pinctrl-0 = <&sound_clk_pins>;
	pinctrl-names = "default";

#if SW_SCIF_CAN
	/* SW8 should be at position 2->1 */
	can1_pins: can1 {
		pinmux = <RZG2L_PORT_PINMUX(40, 0, 3)>, /* TxD */
			 <RZG2L_PORT_PINMUX(40, 1, 3)>; /* RxD */
	};
#endif

#if SW_RSPI_CAN
	/* SW8 should be at position 2->3 so that GPIO9_CAN1_STB line is activated */
	can1-stb-hog {
		gpio-hog;
		gpios = <RZG2L_GPIO(44, 3) GPIO_ACTIVE_HIGH>;
		output-low;
		line-name = "can1_stb";
	};

	can1_pins: can1 {
		pinmux = <RZG2L_PORT_PINMUX(44, 0, 3)>, /* TxD */
			 <RZG2L_PORT_PINMUX(44, 1, 3)>; /* RxD */
	};
#endif

	i2c0_pins: i2c0 {
		pins = "RIIC0_SDA", "RIIC0_SCL";
		input-enable;
	};

	i2c1_pins: i2c1 {
		pins = "RIIC1_SDA", "RIIC1_SCL";
		input-enable;
	};

	i2c2_pins: i2c2 {
		pinmux = <RZG2L_PORT_PINMUX(42, 3, 1)>, /* SDA */
			 <RZG2L_PORT_PINMUX(42, 4, 1)>; /* SCL */
	};

	mtu3_pins: mtu3 {
		mtu3-pwm {
			pinmux = <RZG2L_PORT_PINMUX(44, 0, 4)>, /* MTIOC3A */
				 <RZG2L_PORT_PINMUX(44, 1, 4)>, /* MTIOC3B */
				 <RZG2L_PORT_PINMUX(44, 2, 4)>, /* MTIOC3C */
				 <RZG2L_PORT_PINMUX(44, 3, 4)>; /* MTIOC3D */
		};
	};

	scif0_pins: scif0 {
		pinmux = <RZG2L_PORT_PINMUX(38, 0, 1)>,	/* TxD */
			 <RZG2L_PORT_PINMUX(38, 1, 1)>;	/* RxD */
	};

	scif1_pins: scif1 {
		pinmux = <RZG2L_PORT_PINMUX(40, 0, 1)>, /* TxD */
			 <RZG2L_PORT_PINMUX(40, 1, 1)>, /* RxD */
			 <RZG2L_PORT_PINMUX(41, 0, 1)>, /* CTS# */

Annotation

Implementation Notes