arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi
Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi- Extension
.dtsi- Size
- 9139 bytes
- Lines
- 431
- Domain
- Architecture Layer
- Bucket
- arch/arm64
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
/*
* Device Tree Source for the R9A09G047E57 SMARC SoM board.
*
* Copyright (C) 2024 Renesas Electronics Corp.
*/
/*
* Please set the below switch position on the SoM and the corresponding macro
* on the board DTS:
*
* Switch position SYS.1, Macro SW_SD0_DEV_SEL:
* 0 - SD0 is connected to eMMC (default)
* 1 - SD0 is connected to uSD0 card
*
* Switch position SYS.4, Macro SW_SER2_EN:
* 0 - Select Module DSI connector(GPIO)
* 1 - Select SER2
*
* Switch position SYS.5, Macro SW_LCD_EN:
* 0 - Select Misc. Signals routing
* 1 - Select LCD
*
* Switch position BOOT.6, Macro SW_PDM_EN:
* 0 - Select CAN routing
* 1 - Select PDM
*/
/ {
compatible = "renesas,rzg3e-smarcm", "renesas,r9a09g047e57", "renesas,r9a09g047";
aliases {
ethernet0 = ð0;
ethernet1 = ð1;
i2c2 = &i2c2;
mmc0 = &sdhi0;
mmc2 = &sdhi2;
};
memory@48000000 {
device_type = "memory";
/* First 128MB is reserved for secure area. */
reg = <0x0 0x48000000 0x0 0xf8000000>;
};
pcie_refclk: pcie-ref-clock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <100000000>;
};
reg_1p8v: regulator-1p8v {
compatible = "regulator-fixed";
regulator-name = "fixed-1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
regulator-always-on;
};
reg_3p3v: regulator-3p3v {
compatible = "regulator-fixed";
regulator-name = "fixed-3.3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
};
reg_vdd0p8v_others: regulator-vdd0p8v-others {
Annotation
- Atlas domain: Architecture Layer / arch/arm64.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.