arch/arm64/boot/dts/rockchip/px30-firefly-jd4-core.dtsi

Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/rockchip/px30-firefly-jd4-core.dtsi

File Facts

System
Linux kernel
Corpus path
arch/arm64/boot/dts/rockchip/px30-firefly-jd4-core.dtsi
Extension
.dtsi
Size
6798 bytes
Lines
321
Domain
Architecture Layer
Bucket
arch/arm64
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
 */

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include "px30.dtsi"

/ {
	compatible = "firefly,px30-jd4-core", "rockchip,px30";

	emmc_pwrseq: emmc-pwrseq {
		compatible = "mmc-pwrseq-emmc";
		pinctrl-0 = <&emmc_reset>;
		pinctrl-names = "default";
		reset-gpios = <&gpio1 RK_PB3 GPIO_ACTIVE_HIGH>;
	};

	vcc5v0_sys: regulator-vcc5v0-sys {
		compatible = "regulator-fixed";
		regulator-name = "vcc5v0_sys";
		regulator-always-on;
		regulator-boot-on;
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		vin-supply = <&vcc5v0_baseboard>;
	};
};

&cpu0 {
	cpu-supply = <&vdd_arm>;
};

&cpu1 {
	cpu-supply = <&vdd_arm>;
};

&cpu2 {
	cpu-supply = <&vdd_arm>;
};

&cpu3 {
	cpu-supply = <&vdd_arm>;
};

&emmc {
	bus-width = <8>;
	cap-mmc-highspeed;
	mmc-hs200-1_8v;
	non-removable;
	mmc-pwrseq = <&emmc_pwrseq>;
	vmmc-supply = <&vcc_3v0>;
	vqmmc-supply = <&vccio_flash>;
	status = "okay";
};

&gpu {
	mali-supply = <&vdd_log>;
	status = "okay";
};

&i2c0 {
	status = "okay";

	rk809: pmic@20 {
		compatible = "rockchip,rk809";
		reg = <0x20>;
		interrupt-parent = <&gpio0>;
		interrupts = <7 IRQ_TYPE_LEVEL_LOW>;

Annotation

Implementation Notes