arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts

Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts

File Facts

System
Linux kernel
Corpus path
arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts
Extension
.dts
Size
939 bytes
Lines
42
Domain
Architecture Layer
Bucket
arch/arm64
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
 * Copyright (c) 2016 Xunlong Software. Co., Ltd.
 * (http://www.orangepi.org)
 *
 * Copyright (c) 2021-2023 Tianling Shen <cnsztl@gmail.com>
 */

/dts-v1/;

#include "rk3328-orangepi-r1-plus.dtsi"

/ {
	model = "Xunlong Orange Pi R1 Plus LTS";
	compatible = "xunlong,orangepi-r1-plus-lts", "rockchip,rk3328";
};

&gmac2io {
	phy-handle = <&yt8531c>;
	phy-mode = "rgmii-id";
	status = "okay";

	mdio {
		yt8531c: ethernet-phy@0 {
			compatible = "ethernet-phy-ieee802.3-c22";
			reg = <0>;

			motorcomm,auto-sleep-disabled;
			motorcomm,clk-out-frequency-hz = <125000000>;
			motorcomm,keep-pll-enabled;
			motorcomm,rx-clk-drv-microamp = <5020>;
			motorcomm,rx-data-drv-microamp = <5020>;

			pinctrl-0 = <&eth_phy_reset_pin>;
			pinctrl-names = "default";
			reset-assert-us = <15000>;
			reset-deassert-us = <50000>;
			reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
		};
	};
};

Annotation

Implementation Notes