arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi- Extension
.dtsi- Size
- 9737 bytes
- Lines
- 478
- Domain
- Architecture Layer
- Bucket
- arch/arm64
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
dt-bindings/gpio/gpio.hdt-bindings/pinctrl/rockchip.hdt-bindings/pwm/pwm.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
* Copyright (c) 2019 Vamrs Limited
* Copyright (c) 2019 Amarula Solutions(India)
*/
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/pwm/pwm.h>
/ {
compatible = "vamrs,rk3399pro-vmarc-som", "rockchip,rk3399pro";
aliases {
ethernet0 = &gmac;
mmc0 = &sdhci;
mmc1 = &sdmmc;
};
vcc3v3_pcie: regulator-vcc-pcie {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio4 RK_PD4 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pcie_pwr>;
regulator-name = "vcc3v3_pcie";
regulator-always-on;
regulator-boot-on;
vin-supply = <&vcc5v0_sys>;
};
};
&cpu_l0 {
cpu-supply = <&vdd_cpu_l>;
};
&cpu_l1 {
cpu-supply = <&vdd_cpu_l>;
};
&cpu_l2 {
cpu-supply = <&vdd_cpu_l>;
};
&cpu_l3 {
cpu-supply = <&vdd_cpu_l>;
};
&emmc_phy {
status = "okay";
};
&gmac {
assigned-clocks = <&cru SCLK_RMII_SRC>;
phy-supply = <&vcc_lan>;
snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
};
&hdmi {
ddc-i2c-bus = <&i2c3>;
pinctrl-names = "default";
pinctrl-0 = <&hdmi_cec>;
};
&i2c0 {
clock-frequency = <400000>;
i2c-scl-falling-time-ns = <30>;
i2c-scl-rising-time-ns = <180>;
status = "okay";
Annotation
- Immediate include surface: `dt-bindings/gpio/gpio.h`, `dt-bindings/pinctrl/rockchip.h`, `dt-bindings/pwm/pwm.h`.
- Atlas domain: Architecture Layer / arch/arm64.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.