arch/arm64/boot/dts/rockchip/rk3562-pinctrl.dtsi
Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/rockchip/rk3562-pinctrl.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm64/boot/dts/rockchip/rk3562-pinctrl.dtsi- Extension
.dtsi- Size
- 48922 bytes
- Lines
- 2353
- Domain
- Architecture Layer
- Bucket
- arch/arm64
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
dt-bindings/pinctrl/rockchip.hrockchip-pinconf.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
*/
#include <dt-bindings/pinctrl/rockchip.h>
#include "rockchip-pinconf.dtsi"
/*
* This file is auto generated by pin2dts tool, please keep these code
* by adding changes at end of this file.
*/
&pinctrl {
cam {
/omit-if-no-ref/
camm0_clk0_out: camm0-clk0-out {
rockchip,pins =
/* camm0_clk0_out */
<3 RK_PB2 2 &pcfg_pull_none>;
};
/omit-if-no-ref/
camm0_clk1_out: camm0-clk1-out {
rockchip,pins =
/* camm0_clk1_out */
<3 RK_PB3 2 &pcfg_pull_none>;
};
/omit-if-no-ref/
camm1_clk0_out: camm1-clk0-out {
rockchip,pins =
/* camm1_clk0_out */
<4 RK_PB1 3 &pcfg_pull_none>;
};
/omit-if-no-ref/
camm1_clk1_out: camm1-clk1-out {
rockchip,pins =
/* camm1_clk1_out */
<4 RK_PB7 3 &pcfg_pull_none>;
};
/omit-if-no-ref/
cam_clk2_out: cam-clk2-out {
rockchip,pins =
/* cam_clk2_out */
<3 RK_PB4 2 &pcfg_pull_none>;
};
/omit-if-no-ref/
cam_clk3_out: cam-clk3-out {
rockchip,pins =
/* cam_clk3_out */
<3 RK_PB5 2 &pcfg_pull_none>;
};
};
can0 {
/omit-if-no-ref/
can0m0_pins: can0m0-pins {
rockchip,pins =
/* can0_rx_m0 */
<3 RK_PA1 4 &pcfg_pull_none>,
/* can0_tx_m0 */
<3 RK_PA0 4 &pcfg_pull_none>;
};
/omit-if-no-ref/
can0m1_pins: can0m1-pins {
rockchip,pins =
Annotation
- Immediate include surface: `dt-bindings/pinctrl/rockchip.h`, `rockchip-pinconf.dtsi`.
- Atlas domain: Architecture Layer / arch/arm64.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.