arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5c.dts

Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5c.dts

File Facts

System
Linux kernel
Corpus path
arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5c.dts
Extension
.dts
Size
2407 bytes
Lines
113
Domain
Architecture Layer
Bucket
arch/arm64
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
 * Copyright (c) 2022 FriendlyElec Computer Tech. Co., Ltd.
 * (http://www.friendlyelec.com)
 *
 * Copyright (c) 2023 Tianling Shen <cnsztl@gmail.com>
 */

/dts-v1/;
#include "rk3568-nanopi-r5s.dtsi"

/ {
	model = "FriendlyElec NanoPi R5C";
	compatible = "friendlyarm,nanopi-r5c", "rockchip,rk3568";

	gpio-keys {
		compatible = "gpio-keys";
		pinctrl-names = "default";
		pinctrl-0 = <&reset_button_pin>;

		button-reset {
			debounce-interval = <50>;
			gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_LOW>;
			label = "reset";
			linux,code = <KEY_RESTART>;
		};
	};

	gpio-leds {
		compatible = "gpio-leds";
		pinctrl-names = "default";
		pinctrl-0 = <&lan_led_pin>, <&power_led_pin>, <&wan_led_pin>, <&wlan_led_pin>;

		led-lan {
			color = <LED_COLOR_ID_GREEN>;
			function = LED_FUNCTION_LAN;
			gpios = <&gpio3 RK_PA3 GPIO_ACTIVE_HIGH>;
		};

		power_led: led-power {
			color = <LED_COLOR_ID_RED>;
			function = LED_FUNCTION_POWER;
			linux,default-trigger = "heartbeat";
			gpios = <&gpio3 RK_PA2 GPIO_ACTIVE_HIGH>;
		};

		led-wan {
			color = <LED_COLOR_ID_GREEN>;
			function = LED_FUNCTION_WAN;
			gpios = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>;
		};

		led-wlan {
			color = <LED_COLOR_ID_GREEN>;
			function = LED_FUNCTION_WLAN;
			gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_HIGH>;
		};
	};
};

&pcie2x1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pcie20_reset_pin>;
	reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
	status = "okay";
};

&pcie3x1 {
	num-lanes = <1>;
	reset-gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;

Annotation

Implementation Notes