arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433-pcb-12-10.dtso
Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433-pcb-12-10.dtso
File Facts
- System
- Linux kernel
- Corpus path
arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433-pcb-12-10.dtso- Extension
.dtso- Size
- 3401 bytes
- Lines
- 152
- Domain
- Architecture Layer
- Bucket
- arch/arm64
- Inferred role
- Architecture Layer: arch/arm64
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
dt-bindings/gpio/gpio.hdt-bindings/pinctrl/rockchip.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
/*
* Device tree overlay for TS433 board PCBs-12-10 revision.
*
* Copyright (C) 2025 Heiko Stuebner <heiko@sntech.de>
*/
/dts-v1/;
/plugin/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rockchip.h>
&{/} {
/*
* The default hardware-state of this gpio causes the drive
* to be already running when entering the kernel.
* regulator-boot-on is needed to prevent one additional
* power-cycle on the drive.
*
* With regulator-boot-on we get the expected 1 cycle
* per boot, without it we end up with 2 cycles as seen
* via smartctl.
*/
hdd1_pwr: regulator-hdd1-power {
compatible = "regulator-fixed";
gpio = <&gpio0 RK_PC2 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&hdd1_power_pin>;
regulator-name = "hdd1-power";
regulator-boot-on;
vin-supply = <&dc_12v>;
};
hdd2_pwr: regulator-hdd2-power {
compatible = "regulator-fixed";
gpio = <&gpio0 RK_PC3 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&hdd2_power_pin>;
regulator-name = "hdd2-power";
regulator-boot-on;
vin-supply = <&dc_12v>;
};
/*
* HDD3+4 are connected to ports of the PCIe SATA controller.
* Currently there is no way to attach those, so keep them
* always on.
*/
hdd3_pwr: regulator-hdd3-power {
compatible = "regulator-fixed";
gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&hdd3_power_pin>;
regulator-name = "hdd3-power";
regulator-always-on;
regulator-boot-on;
vin-supply = <&dc_12v>;
};
hdd4_pwr: regulator-hdd4-power {
compatible = "regulator-fixed";
gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&hdd4_power_pin>;
regulator-name = "hdd4-power";
regulator-always-on;
regulator-boot-on;
vin-supply = <&dc_12v>;
};
Annotation
- Immediate include surface: `dt-bindings/gpio/gpio.h`, `dt-bindings/pinctrl/rockchip.h`.
- Atlas domain: Architecture Layer / arch/arm64.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.