arch/arm64/boot/dts/rockchip/rk3588-extra.dtsi

Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/rockchip/rk3588-extra.dtsi

File Facts

System
Linux kernel
Corpus path
arch/arm64/boot/dts/rockchip/rk3588-extra.dtsi
Extension
.dtsi
Size
21469 bytes
Lines
696
Domain
Architecture Layer
Bucket
arch/arm64
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
 */

#include "rk3588-base.dtsi"
#include "rk3588-extra-pinctrl.dtsi"

/ {
	hdmi1_sound: hdmi1-sound {
		compatible = "simple-audio-card";
		simple-audio-card,format = "i2s";
		simple-audio-card,mclk-fs = <128>;
		simple-audio-card,name = "hdmi1";
		status = "disabled";

		simple-audio-card,codec {
			sound-dai = <&hdmi1>;
		};

		simple-audio-card,cpu {
			sound-dai = <&i2s6_8ch>;
		};
	};

	reserved-memory {
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;

		/*
		 * The 4k HDMI capture controller works only with 32bit
		 * phys addresses and doesn't support IOMMU. HDMI RX CMA
		 * must be reserved below 4GB.
		 * The size of 160MB was determined as follows:
		 * (3840 * 2160 pixels) * (4 bytes/pixel) * (2 frames/buffer) / 10^6 = 66MB
		 * To ensure sufficient support for practical use-cases,
		 * we doubled the 66MB value.
		 */
		hdmi_receiver_cma: hdmi-receiver-cma {
			compatible = "shared-dma-pool";
			alloc-ranges = <0x0 0x0 0x0 0xffffffff>;
			size = <0x0 (160 * 0x100000)>; /* 160MiB */
			alignment = <0x0 0x40000>; /* 64K */
			no-map;
			status = "disabled";
		};
	};

	usb_host1_xhci: usb@fc400000 {
		compatible = "rockchip,rk3588-dwc3", "snps,dwc3";
		reg = <0x0 0xfc400000 0x0 0x400000>;
		interrupts = <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH 0>;
		clocks = <&cru REF_CLK_USB3OTG1>, <&cru SUSPEND_CLK_USB3OTG1>,
			 <&cru ACLK_USB3OTG1>;
		clock-names = "ref_clk", "suspend_clk", "bus_clk";
		dr_mode = "otg";
		phys = <&u2phy1_otg>, <&usbdp_phy1 PHY_TYPE_USB3>;
		phy-names = "usb2-phy", "usb3-phy";
		phy_type = "utmi_wide";
		power-domains = <&power RK3588_PD_USB>;
		resets = <&cru SRST_A_USB3OTG1>;
		snps,dis_enblslpm_quirk;
		snps,dis-u2-freeclk-exists-quirk;
		snps,dis-del-phy-power-chg-quirk;
		snps,dis-tx-ipgap-linecheck-quirk;
		status = "disabled";
	};

	pcie30_phy_grf: syscon@fd5b8000 {

Annotation

Implementation Notes