arch/arm64/boot/dts/rockchip/rk3588-extra-pinctrl.dtsi
Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/rockchip/rk3588-extra-pinctrl.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm64/boot/dts/rockchip/rk3588-extra-pinctrl.dtsi- Extension
.dtsi- Size
- 9908 bytes
- Lines
- 518
- Domain
- Architecture Layer
- Bucket
- arch/arm64
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
dt-bindings/pinctrl/rockchip.hrockchip-pinconf.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2021 Rockchip Electronics Co., Ltd.
*/
#include <dt-bindings/pinctrl/rockchip.h>
#include "rockchip-pinconf.dtsi"
/*
* This file is auto generated by pin2dts tool, please keep these code
* by adding changes at end of this file.
*/
&pinctrl {
clk32k {
/omit-if-no-ref/
clk32k_out1: clk32k-out1 {
rockchip,pins =
/* clk32k_out1 */
<2 RK_PC5 1 &pcfg_pull_none>;
};
};
eth0 {
/omit-if-no-ref/
eth0_pins: eth0-pins {
rockchip,pins =
/* eth0_refclko_25m */
<2 RK_PC3 1 &pcfg_pull_none>;
};
};
fspi {
/omit-if-no-ref/
fspim1_pins: fspim1-pins {
rockchip,pins =
/* fspi_clk_m1 */
<2 RK_PB3 3 &pcfg_pull_up_drv_level_2>,
/* fspi_cs0n_m1 */
<2 RK_PB4 3 &pcfg_pull_up_drv_level_2>,
/* fspi_d0_m1 */
<2 RK_PA6 3 &pcfg_pull_up_drv_level_2>,
/* fspi_d1_m1 */
<2 RK_PA7 3 &pcfg_pull_up_drv_level_2>,
/* fspi_d2_m1 */
<2 RK_PB0 3 &pcfg_pull_up_drv_level_2>,
/* fspi_d3_m1 */
<2 RK_PB1 3 &pcfg_pull_up_drv_level_2>;
};
/omit-if-no-ref/
fspim1_cs1: fspim1-cs1 {
rockchip,pins =
/* fspi_cs1n_m1 */
<2 RK_PB5 3 &pcfg_pull_up_drv_level_2>;
};
};
gmac0 {
/omit-if-no-ref/
gmac0_miim: gmac0-miim {
rockchip,pins =
/* gmac0_mdc */
<4 RK_PC4 1 &pcfg_pull_none>,
/* gmac0_mdio */
<4 RK_PC5 1 &pcfg_pull_none>;
};
/omit-if-no-ref/
Annotation
- Immediate include surface: `dt-bindings/pinctrl/rockchip.h`, `rockchip-pinconf.dtsi`.
- Atlas domain: Architecture Layer / arch/arm64.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.